mirror of
https://github.com/stevenhowes/wbios.git
synced 2026-05-27 00:03:32 +01:00
Steve Howes
500 lines
11 KiB
Plaintext
500 lines
11 KiB
Plaintext
;
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; Timer / RTC functions
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;
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; (C)1997-2001 Pascal Dornier / PC Engines; All rights reserved.
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; This file is licensed pursuant to the COMMON PUBLIC LICENSE 0.5.
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;
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; Limitations:
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;
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; - Wait function not supported.
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; - Reinitialization doesn't set SET bit.
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; - We don't use CMOS RAM for configuration data
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; (exception: extended memory size).
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; - There is no CMOS checksum.
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;
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; Year 2000 issue:
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;
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; - Years below 1980 are considered century roll-over, replaced
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; by year 2000.
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; - Please note that DOS will force default date for anything
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; before 1980.
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; pd 000817 add TICK_RATE option to support AMD Elan SC520
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; (needs modified tick rate)
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; pd 990211 move tests from cm_shut to cm_test
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; pd 980416 fix alarm function (interrupt mask, CX saved)
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;
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; INT1A timer BIOS
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;
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int1a:
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#if def PCI ;transfer to PCI BIOS if necessary
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cmp ah,0b1h ;PCI
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jnz int1a1
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jmp pci_i1a ;go to PCI BIOS
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int1a1:
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#endif
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sti ;enable interrupts
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push ds
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push bx
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xor bx,bx ;BIOS segment
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mov ds,bx
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cmp ah,7
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ja int1a_err ;:bad command code
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mov bl,ah
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shl bx,1
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cli ;disable interrupts
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jmp [cs:bx+int1atab] ;dispatch function
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;
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; AH=2: get RTC time
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;
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rtc_get: call rtc_uip ;check for RTC update
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jb int1a_err ;:error
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mov ah,cm_ss ;read seconds -> DH
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call rtc_read
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mov dh,al
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mov ah,cm_mm ;read minutes -> CL
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call rtc_read
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mov cl,al
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mov ah,cm_hh ;read hours -> CH
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call rtc_read
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mov ch,al
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mov ah,cm_b ;read daylight savings bit -> DL
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call rtc_read
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and al,1
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mov dl,al
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jmp short int1a_ok
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;
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; AH=3: set RTC time
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;
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rtc_set: push cx
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call rtc_uip ;check for RTC update
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pop cx
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mov ah,cm_ss ;DH -> seconds
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mov al,dh
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call rtc_write
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mov ah,cm_mm ;CL -> minutes
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mov al,cl
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call rtc_write
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mov ah,cm_hh ;CH -> hours
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mov al,ch
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call rtc_write
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mov ah,cm_b ;read status register B
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call rtc_read
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and al,01100010xb ;mask off set, update interrupt,
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;square wave, daylight savings
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or al,2 ;set 24 hour mode
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or al,dl ;add daylight savings bit from DL
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call rtc_write ;update status register B
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int1a_ok: clc
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int1a_ret: sti
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pop bx
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pop ds
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retf 2
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int1a_err: stc
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jmp short int1a_ret
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;
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; AH=4: get RTC date
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;
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rtc_date: call rtc_uip ;check for RTC update
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jb int1a_err
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mov ah,cm_dd ;day -> DL
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call rtc_read
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mov dl,al
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mov ah,cm_mo ;month -> DH
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call rtc_read
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mov dh,al
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mov ah,cm_yy ;year -> CL
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call rtc_read
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mov cl,al
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mov ah,cm_cent ;century -> CH
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call rtc_read
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mov ch,al
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cmp cx,1980h ;century roll-over ?
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jae rtc_date9
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mov ax,cm_cent*256+20h ;update century register
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call rtc_write
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mov ch,20h ;force 2000
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rtc_date9: jmp int1a_ok
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;
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; AH=5: set RTC date
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;
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rtc_sdat: push cx
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call rtc_uip ;check for RTC update
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pop cx
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mov ax,cm_day*256 ;0 -> day of week (not used)
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call rtc_write
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mov ah,cm_dd ;DL -> day
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mov al,dl
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call rtc_write
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mov ah,cm_mo ;DH -> month
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mov al,dh
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call rtc_write
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mov ah,cm_yy ;CL -> year
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mov al,cl
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call rtc_write
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mov ah,cm_cent ;CH -> century
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mov al,ch
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call rtc_write
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jmp int1a_ok
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;
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; AH=6: set RTC alarm
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;
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rtc_alrm: mov ah,cm_b ;read status B
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call rtc_read
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and al,20h ;alarm enabled ?
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jnz int1a_err ;:error
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push cx ;save CX !
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call rtc_uip ;check for RTC update
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pop cx ;restore...
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mov ah,cm_ssa ;DH -> alarm second
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mov al,dh
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call rtc_write
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mov ah,cm_mma ;CL -> alarm minute
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mov al,cl
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call rtc_write
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mov ah,cm_hha ;CH -> alarm hour
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mov al,ch
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call rtc_write
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in al,pic1+1 ;read mask register
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and al,0feh ;enable RTC interrupt (8)
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out pic1+1,al
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mov ah,cm_b ;read status B
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call rtc_read
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or al,20h ;enable alarm
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call rtc_write
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jmp int1a_ok
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;
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; AH=7: clear RTC alarm
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;
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rtc_snz: mov ah,cm_b ;read status B
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call rtc_read
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and al,5fh ;disable alarm interrupt
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call rtc_write
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jmp int1a_ok
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;
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; AH=0: get time
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;
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tm_get: mov dx,[m_timer] ;DX = timer low
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mov cx,[m_timer+2] ;CX = timer high
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mov al,0
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xchg al,[m_timofl] ;AL = timer overflow, reset flag
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jmp int1a_ok
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;
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; AH=1: set time
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;
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tm_set: mov byte [m_timofl],0 ;clear timer overflow flag
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mov [m_timer],dx ;DX = timer low
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mov [m_timer+2],cx ;CX = timer high
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jmp int1a_ok
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;
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; INT1A dispatch table
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;
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even
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int1atab: dw tm_get ;AH=0: get time
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dw tm_set ;AH=1: set time
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dw rtc_get ;AH=2: get RTC time
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dw rtc_set ;AH=3: set RTC time
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dw rtc_date ;AH=4: get RTC date
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dw rtc_sdat ;AH=5: set RTC date
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dw rtc_alrm ;AH=6: set RTC alarm
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dw rtc_snz ;AH=7: clear RTC alarm
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;
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; Clear RTC interrupt, test shutdown byte
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;
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; Be sure to leave cm_test non-zero, as this is used by the
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; master reset code in cs_clr to determine whether to reset
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; the bus.
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;
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rtc_test: mov al,cm_nmi+cm_c ;clear pending interrupt
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out cm_idx,al
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out iowait,al
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in al,cm_dat
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mov bx,8000h+cm_nmi+cm_test ;bit to test, test register
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rtc_test1: mov al,bl ;write pattern
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out cm_idx,al
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out iowait,al
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mov al,bh
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out cm_dat,al
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out iowait,al
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mov al,bl ;read back
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out cm_idx,al
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out iowait,al
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in al,cm_dat
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out iowait,al
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cmp al,bh
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jnz rtc_test8 ;:error - clc -> inverted -> error
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shr bh,1 ;shift pattern right
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jnb rtc_test1 ;:another bit
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rtc_test8: cmc ;last bit inverted -> no carry if ok
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ret
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;
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; Wait for RTC UIP bit cleared
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;
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; This bit is set about 250æs before the next update. If clear,
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; we have at least 250æs to read or write the RTC without
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; updates coming in between.
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;
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rtc_uip: mov cx,1000
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mov ah,cm_a
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rtc_uip1: cli
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call rtc_read
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and al,80h ;UIP ?
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jz rtc_uip9 ;:ok, carry clear
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sti ;give interrupts a chance
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loop rtc_uip1 ;:try again
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mov ax,cm_a*256+26h ;set 32768 Hz oscillator, 1 ms int
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call rtc_write ;to restart...
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stc
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rtc_uip9: ret
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;
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; read RTC register [AH] -> AL
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;
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rtc_read: mov al,ah
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out cm_idx,al
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out iowait,al
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in al,cm_dat
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out iowait,al
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ret
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;
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; write RTC register AL -> [AH]
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;
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rtc_write: xchg al,ah
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out cm_idx,al
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out iowait,al
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xchg al,ah
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out cm_dat,al
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ret
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;
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; clock tick (IRQ0)
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;
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irq0: sti ;enable interrupts
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push ax
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push dx
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push ds
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#if def debug
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call diag_csip ;debug: display CS:IP on MDA
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#endif
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xor ax,ax ;access BIOS segment
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mov ds,ax
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mov ax,[m_timer] ;update timer
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mov dx,[m_timer+2]
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add ax,1
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adc dx,0
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cmp ax,00b2h ;24 hours ?
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jnz irq0_1
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cmp dx,0018h
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jnz irq0_1
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xor ax,ax ;timer overflow - back to 0
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xor dx,dx
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mov byte [m_timofl],1
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irq0_1: mov [m_timer],ax
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mov [m_timer+2],dx
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dec byte [m_fdcnt] ;floppy motor timer
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jnz irq0_2 ;:not yet
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mov al,0ch
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mov dx,fdc_ctrl
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out dx,al ;turn off motor
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and byte [m_fdmot],0f0h ;turn off motor bits
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irq0_2: int 1ch ;call user hook
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pop ds
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pop dx
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mov al,eoi ;signal end of interrupt
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cli
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out pic0,al
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pop ax
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iret
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;
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; RTC interrupt (IRQ8)
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;
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irq8: push ax
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mov al,cm_c ;check alarm interrupt bit
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out cm_idx,al
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out iowait,al
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in al,cm_dat
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test al,20h
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jz irq8_1
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push ax
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int 4ah ;call user hook
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pop ax
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irq8_1: mov al,eoi ;signal end of interrupt
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out pic1,al
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out pic0,al
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pop ax
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iret
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;
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; Timer initialization -> 18.2 Hz tick
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; Unmask timer and keyboard interrupts
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;
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tim_init: mov al,36h ;square wave generator
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out timer+3,al
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#if def TICK_RATE
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mov al,low(TICK_RATE) ;LSB
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out timer,al
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mov al,high(TICK_RATE) ;MSB
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out timer,al
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#else
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mov al,0
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out timer,al
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out timer,al
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#endif
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in al,pic0+1 ;enable timer, keyboard interrupt
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and al,11111100xb
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out iowait,al
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out pic0+1,al
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out iowait,al
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mov al,eoi
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out pic0,al
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ret
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;
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; RTC init
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;
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rtc_ini: mov ah,cm_d ;read status register D
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call rtc_read
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and al,80h ;battery low ?
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jz rtc_ini0 ;:yes
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; battery ok - validate the time / date
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mov ah,2 ;get RTC time
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int 1ah
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jb rtc_ini0 ;:error
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mov al,dh ;validate seconds
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mov ah,60h
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call rtc_val
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jb rtc_ini0 ;:bad
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mov al,cl ;validate minutes
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mov ah,60h
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call rtc_val
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jb rtc_ini0 ;:bad
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mov al,ch ;validate hours
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mov ah,24h
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call rtc_val
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jb rtc_ini0 ;:bad
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mov ah,4 ;get RTC date
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int 1ah
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mov al,dl ;day
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mov ah,31h
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call rtc_val
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jb rtc_ini0 ;:bad
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mov al,dh ;month
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mov ah,12h
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call rtc_val
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jb rtc_ini0 ;:bad
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mov ax,cx
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cmp ax,1980h ;minimum 1980
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jb rtc_ini0
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cmp ax,2099h ;maximum 2099
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ja rtc_ini0
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mov ah,99h ;maximum year
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call rtc_val
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jb rtc_ini0 ;:bad
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mov ax,cm_dia*256 ;clear diag register
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call rtc_write
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jmp short rtc_ini2
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; battery was low or invalid time - initialize the RTC
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rtc_ini0: inc byte [tmp_rtc] ;set RTC failure flag
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mov si,offset rtc_tab
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rtc_ini1: cs: lodsw ;get value from table
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call rtc_write ;write to RTC
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cmp si,offset rtc_tab9 ;end of table ?
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jb rtc_ini1 ;:no
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; Set timer tick value from RTC time
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;
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; Please note that there are different algorithms with varying
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; accuracy for doing this, there can be slight time discrepancies
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; depending on what algorithm is used by the OS.
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rtc_ini2: mov ah,2 ;get RTC time
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int 1ah
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jb rtc_ini9 ;:error
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mov [tmp_ss],dh ;save second for run check
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mov [tmp_mm],cl ;save minute for run check
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push dx
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xor ebx,ebx
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mov al,ch ;hour
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mov edx,01000755h ;18.206 * 3600 * 256
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call rtc_mul
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mov al,cl ;minute
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mov edx,00044464h ;18.206 * 60 * 256
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call rtc_mul
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pop ax ;second
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mov al,ah
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mov dx,4661 ;18.206 * 256
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call rtc_mul
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shr ebx,8 ;timer / 256
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mov dword [m_timer],ebx ;set timer
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mov [tmp_timer],bx ;backup for run check
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rtc_ini9: ret
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;
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; convert number in AL from BCD -> binary, * EDX -> add to EBX
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;
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rtc_mul: mov ah,al ;high digit
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and al,15 ;mask low digit
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shr ah,4 ;high -> low nibble
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aad ;convert to binary
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db 066h
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cbw ;clear top of eax
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mul edx
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add ebx,eax ;add ebx,eax
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ret
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;
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; validate a BCD number in AL, AH = limit
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;
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rtc_val: cmp al,ah ;exceed limit ?
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ja rtc_val9 ;(no carry -> cmc -> error)
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and al,15 ;high digit is ok, now check low digit
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cmp al,10 ;(less than 10 -> carry -> cmc -> ok)
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rtc_val9: cmc ;return error status
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ret
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;
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; Timer & RTC test
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;
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tim_test: mov ax,[m_timer] ;did we get at least one timer tick ?
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cmp ax,[tmp_timer]
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jnz tim_test0 ;:ok
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; Could fail if floppy and IDE init were super fast. Give it
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; another chance.
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mov bx,60 ;wait 60 ms
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call cs_waitbx
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mov ax,[m_timer] ;did we get at least one timer tick ?
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cmp ax,[tmp_timer]
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jz tim_test8 ;no: error
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tim_test0: add ax,20 ;wait max. of one second
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xchg ax,bx
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tim_test1: mov ah,2 ;read RTC
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int 1ah
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jb tim_test8 ;:error
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cmp dh,[tmp_ss] ;compare second
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jnz tim_test9 ;:ok
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cmp cl,[tmp_mm] ;compare minute
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jnz tim_test9 ;:ok
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cmp bx,[m_timer] ;time-out ?
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js tim_test8 ;:yes
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hlt ;wait for next interrupt
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jmp tim_test1 ;look again
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tim_test8: inc byte [tmp_tim] ;set error flag
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tim_test9: ret
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