Initial commit of 1.11 source as released by PC Engines

Original source https://www.pcengines.ch/file/wbios111s.zip
This commit is contained in:
Steve Howes
2023-07-25 16:17:48 +01:00
commit d410ad0acb
57 changed files with 13831 additions and 0 deletions
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;
; POST power on self-test
;
; (C)1997-2001 Pascal Dornier / PC Engines; All rights reserved.
; This file is licensed pursuant to the COMMON PUBLIC LICENSE 0.5.
;
; pd 040325 extend temporary area (option TEMPSIZE)
; pd 021118 add disakbd / enakbd around PS/2 mouse detection
; (suggested by Klaus Pfaadt)
; pd 010429 change VGA_END to allow for large VGA BIOS (e.g.
; C&T / Asiliant VGA)
; pd 991021 add option for M-Systems DiskOnChip
#if ! def ROM_BEG
ROM_BEG equ 0c800h ;start of ROM scan
#endif
#if ! def ROM_END
ROM_END equ 0f800h ;end of ROM scan
#endif
#if ! def VGA_BEG
VGA_BEG equ 0c000h ;start of VGA BIOS scan
#endif
#if ! def VGA_END
VGA_END equ 0c800h ;end of VGA BIOS scan
#endif
;
; Reset entry
;
; Note: Processor shutdown is NOT supported. There are easier and
; faster ways to get out of protected mode.
;
reset: cli
cld
mov ax,cs ;SS = CS (to support fake stack)
mov ss,ax
mov ds,ax ;DS = CS (for easier table loads)
mov al,01h ;POST code: reset entry
ret_sp postcode
ret_sp cs_clr ;clear chipset registers to allow
;access to DMA, IRQ controller
ret_sp post_clr ;clear registers
;
; Initialize chipset
;
resetcs: mov al,02h ;POST code: chipset initialization
ret_sp postcode
ret_sp cs_init ;initialize chipset
rstini: jb rstvid ;:shadow already enabled
;
; Detect base memory size
;
mov al,03h ;POST code: detect base memory size
ret_sp postcode
ret_sp cs_det ;detect memory
rstdet: ;may return by RET or JMP
;
; Init shadow RAM - if DRAM is bad, we'll die here
; (running out of shadow makes for a more effective
; memory test, and accelerates startup).
;
mov al,04h ;POST code: initialize shadow RAM
ret_sp postcode
ret_sp cs_shad ;init shadow
rstshad2:
;
; Init Hercules video card (blind init, we don't care if it's there)
;
rstvid: mov al,05h ;POST code: init mono video
ret_sp postcode
#if ! def NO_VIDINIT
ret_sp vid_init ;let there be light ...
#endif
;
; disable all PCI adapters on primary bus -> get bus masters
; to shut up...
;
#if def PCI
rstpci: mov al,06h ;POST code: disable PCI devices
ret_sp postcode
ret_sp pci_rst
#endif
;
; Check low 64KB of DRAM
;
mov al,07h ;POST code: test low 64KB of DRAM
ret_sp postcode
ret_sp getunreal ;enter unreal mode
xor ebp,ebp ;start address
mov dx,[m_rstflg] ;save reset flag
ret_sp post_t64k ;test first 64K of DRAM
jnb rstmem5 ;:ok
mov al,0f7h ;POST code: low 64KB failure
jmp fatal ;handle fatal error
rstmem5: mov [m_rstflg],dx ;restore reset flag
;
; initialize stack
;
mov al,08h ;POST code: initialize stack
ret_sp postcode
mov sp,tmp_stack ;set stack
xor ax,ax
mov ss,ax
;
; Set CPU specific parameters, enable L1 cache
;
call cs_cpu ;DS = 0
;
; Check BIOS checksum
;
mov al,09h ;POST code: BIOS checksum
call postcode
call cs_shadrw ;set read/write shadow
call d_dosum ;update data checksum
call cs_shadro ;set read only shadow
#if ! def NO_ROMSUM
call post_sum ;verify BIOS checksum
call post_err ;hang if error
#endif
;
; Configure super I/O
;
mov al,0ah ;POST code: super I/O initialization
call postcode
call sio_init
;
; Clear RTC interrupts, test shutdown byte, set operating mode
;
mov al,0bh ;POST code: RTC test
call postcode
#if ! def RTC_SKIP
call rtc_test
#if ! def IGNORE_RTC
call post_err
#endif
#endif
;
; Test refresh (and indirectly, 8254 timer)
;
mov al,0ch ;POST code: refresh / 8254 test
call postcode
call post_ref
#if ! def IGNORE_REF
call post_err
#endif
;
; Set speed-dependent chipset registers
; (done after post_ref)
;
mov al,0dh ;POST code: speed-dependent chipset regs
call postcode
call cs_spd
;
; Test 8237 DMA registers
;
mov al,0eh ;POST code: test 8237 DMA
call postcode
#if ! def DMA_SKIP
call post_dma
call post_err
#endif
;
; Test DMA page registers
;
mov al,0fh ;POST code: test DMA page registers
call postcode
call post_page
call post_err
;
; Test 8254 registers
;
mov al,10h ;POST code: test 8254 registers
call postcode
call post_tim
call post_err
;
; Test keyboard controller (don't care whether we have a keyboard)
;
mov al,11h ;POST code: test keyboard controller
call postcode
call kb_ini
#if ! def NO_KBC
call post_err
#endif
;
; Initialize Timer, DMA, interrupt registers, port 92
;
mov al,12h ;POST code: init timer, DMA, 8259...
call postcode
call post_tdma
;
; Test 8259 interrupt mask registers
;
mov al,13h ;POST code: test 8259 mask registers
call postcode
call post_irq
call post_err
;
; Size and test low 640 KB
;
mov al,14h ;POST code: test low 640KB
call postcode
call post_base ;base memory test
;
; Initialize memory locations, interrupt vectors, etc.
;
mov al,15h ;POST code: init vectors
call postcode
call post_vec ;init interrupt vectors
call vid_vars ;initialize Hercules video BIOS vars
mov byte [m_devflg],00110000xb ;no floppy present, monochrome
#if def GX_VID
call gx_video ;initialize GX video
#endif
#if def GX_INT10
call gxv_init ;initialize GX int 10
#endif
#if def VID_CGA
call cs_cga ;enable CGA redirect
#endif
;
; run PCI plug & play
;
#if def PCI
mov al,16h ;POST code: PCI plug & play
call postcode
call cs_shadrw ;enable read / write shadow
#if def PCI_WAIT
mov bx,500 ;option PCI_WAIT: give slow
call cs_waitbx ;PCI peripherals time to wake up
#endif
#if ! def SKIP_PNP
call pci_pnp
mov eax,(INTD shl 24)+(INTC shl 16)+(INTB shl 8)+INTA
call cs_pciint ;set interrupt channels
#endif
#endif
;
; shadow video BIOS (unless PCI already did it)
;
mov al,17h ;POST code: shadow video BIOS
call postcode
call cs_vshad
;
; Look for VGA video BIOS at C000
;
mov al,18h ;POST code: look for VGA BIOS
call postcode
mov bx,VGA_BEG ;starting address
mov dx,VGA_END ;ending address
call post_scan
mov ax,cs
cmp [vec10+2],ax ;did VGA initialize ?
jz rstmda ;:no, still same interrupt
mov byte [m_devflg],0 ;VGA
rstmda:
;
; Display signon prompt, base memory size
;
mov al,19h ;POST code: sign-on prompt
call postcode
#if def CONSOLE
call con_init ;initialize serial console
#endif
mov si,copyrt
call v_msg
xor eax,eax
mov ax,[m_lomem] ;memory size
call post_itoa ;display number
mov si,msg_base ;display " KB Base Memory"
call v_msg
;
; keyboard test #2
;
mov al,1ah ;POST code: second keyboard test
call postcode
call kb_inb
;
; Size and test extended memory
;
mov al,1bh ;POST code: extended memory test
call postcode
#if ! def SKIP_EXTEST
call cs_a20on ;enable A20 gate
call post_ext ;test extended memory
#endif
;
; keyboard test, enable timer tick, enable interrupts
;
mov al,1ch ;POST code: enable interrupts
call postcode
call kb_inc ;continue keyboard initialization
call tim_init ;initialize timer tick, unmask ints
sti ;enable interrupts
call kb_ind ;set keyboard LEDs
;
; test & init RTC
;
mov al,1dh ;POST code: test / init RTC
call postcode
call rtc_ini
;
; Initialize floppy disk: detect, spin up, recalibrate
;
mov al,1eh ;POST code: init floppy disk
call postcode
call fd_init
;
; ROM scan
;
#if ! def DISKONCHIP
mov al,1fh ;POST code: option ROM scan
call postcode
#if ! def NO_ROMSCAN
mov bx,ROM_BEG ;starting address
mov dx,ROM_END ;ending address
#if def WRAP ;WRAP: disable PXE BIOS
cmp byte [cs:CFG_OFS+cfg_pxe],0 ;disable ?
jz skiprom
#endif
call post_scan
skiprom:
#endif
#endif
;
; Test & init parallel ports
;
mov al,20h ;POST code: test parallel ports
call postcode
call lp_test
;
; Test & init serial ports
;
mov al,21h ;POST code: test serial ports
call postcode
call rs_test
;
; enable numeric coprocessor
;
mov al,22h ;POST code: enable coprocessor
call postcode
call cs_npx
;
; secondary floppy init
;
mov al,23h ;POST code: floppy init
call postcode
call fd_inb
;
; IDE initialization
;
mov al,24h ;POST code: hard disk init
call postcode
call cs_shadrw ;set read/write shadow
call hd_init ;init disk drives
call d_dosum ;update data checksum
call cs_shadro ;set read only shadow
;
; Flash disk initialization
;
#if def FLASHDISK
call fld_init ;initialize flash disk
#endif
;
; ROM scan (alternate location for M-Systems DiskOnChip)
;
; Caution: their firmware version 3.3.5 will HANG if no HDD
; present. Connect a HDD, and update their boot image to
; DOC121.EXB or later.
;
#if def DISKONCHIP
mov al,1fh ;POST code: option ROM scan
call postcode
#if ! def NO_ROMSCAN
mov bx,ROM_BEG ;starting address
mov dx,ROM_END ;ending address
call post_scan
#endif
#endif
;
; detect PS/2 mouse
;
#if def PS2MOUSE
mov al,25h ;POST code: PS/2 mouse detect
call postcode
call ps2init ;initialize mouse
#endif
;
; Timer / RTC update check
;
; Note: This test can take up to one second (normally overlapped
; with floppy / IDE init), skip if not required.
;
mov al,26h ;POST code: timer/RTC check
call postcode
#if ! def NO_RTCFAIL
call tim_test
cmp byte [tmp_tim],0
rsttim: jnz rsttim ;hang if failure
#endif
;
; enable L2 cache if present
;
#if def cs_cache
mov al,27h
call postcode
call cs_cache
#endif
;
; OEM decision: verify diagnostic flags to decide
; whether to boot or display error messages
;
mov al,28h ;POST code: OEM boot decision point
call postcode
call decide
;
; clean up before boot
;
mov word [m_rstflg],0 ;clear reset flag
mov di,0500h ;clear temporary data area: 0500..11FF
#if ! def TEMPSIZE
TEMPSIZE equ 01200
#endif
mov cx,(TEMPSIZE-0500h) / 2
xor ax,ax
rep stosw ;this also overwrites stack !
;
; Boot operating system
;
mov al,00h ;POST code: boot
call postcode
#if def BOOTBEEP
call beep ;let there be noise
#endif
int 19h ;boot
mov al,0dfh ;we shouldn't get here
call postcode
cli
hlt ;hang
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WRAP BIOS source pd 071129
----------------
Files provided for your reference, use at your own risk. These files
will assemble to the same binary as the 1.11 BIOS version.
To assemble the BIOS you will need the A386 assembler (www.eji.com).
wrap1.bat makes wrap1.rom (WRAP.1C..1E)
wrap2.bat makes wrap2.rom (WRAP.2C..2E)
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;
; WRAP BIOS update
;
; pd 030807
; pd 040115 compare before erase, retry message on failure
;
org 0100
jmp start
;
; variables
;
even
rombase equ 0fffe0000
port61 equ 061
iowait equ 0eb
bufpt: dd 0 ;buffer pointer
devid: dw 0 ;device ID
file: dw 0 ;file handle
bufseg: dw 0 ;buffer segment
curseg: dw 0 ;current segment
count: db 4 ;number of 32KB blocks to be read
rom64: db 0 ;1 = 64KB flash
msg_strt: db "WRAP flash update",13,10
db "Reading 128KB flash image "
filename: db "wrap.rom",0 ;file name
msg_io: db " - I/O error !",13,10,0
msg_open: db 13,10,"Flash ID",0
msg_fail: db " - FAIL !",13,10,0
msg_zap: db 13,10,"Erase",0
msg_set: db " Program",0
msg_cmp: db " Verify",0
msg_ok: db 13,10,"Flash update OK.",13,10,0
msg_try: db "(R)etry (Q)uit ?",13,10,0
msg_same: db 13,10,"Flash verify OK.",13,10,0
;
; main code
;
start: cld
mov sp,offset stack1
mov si,offset msg_strt
call v_msg
; set segment values
xor eax,eax ;set buffer segment
mov ax,cs
shl eax,4 ;-> physical
add eax,offset stack1
mov [bufpt],eax
shr eax,4 ;-> segment
mov [bufseg],ax
mov [curseg],ax
xor eax,eax ;set GDT physical address
mov ax,cs
shl eax,4
add eax,offset gdt
mov dword [gdtadr],eax
; open image file
mov dx,offset filename
mov ax,3d00h ;open file
int 21h
mov [file],ax ;save file handle
jb long ioerr
start3: mov bx,[file] ;file handle
xor dx,dx ;destination DS:DX
mov ds,[curseg]
mov cx,8000h ;read 32KB
mov ah,03f ;block read
int 21h
push cs ;restore DS
pop ds
jb ioerr
cmp ax,8000h ;read all ?
jnz ioerr
add word [curseg],0800 ;update segment
dec byte [count]
jnz start3 ;:another block
mov ah,03e ;close
mov bx,[file] ;file handle
int 21h
jb ioerr
start4: mov si,offset msg_open ;look for flash
call v_msg
call rom_open ;read device ID
call rom_cmp ;verify flash
mov si,offset msg_same
jnb start9 ;:same, give message and exit
mov si,offset msg_zap ;erase flash
call v_msg
call rom_zap
mov si,offset msg_set ;program flash
call v_msg
call rom_set
mov si,offset msg_cmp ;verify flash
call v_msg
call rom_cmp
mov si,offset msg_ok
jnb start9 ;:ok
mov si,offset msg_fail
barf: call getreal
call v_msg ;display error message
mov si,offset msg_try
call v_msg ;ask for retry
start5: mov ah,0 ;get key
int 16h
cmp al,"Q"
jz terminat ;Q = exit
cmp al,"q"
jz terminat
cmp al,"R"
jz start4 ;R = retry
cmp al,"r"
jz start4
jmp start5
ioerr: mov si,offset msg_io ;I/O error
start9: call v_msg ;display message
terminat: call rom_exit ;write-protect flash
mov ax,4c00h ;terminate
int 21h
;
; display string [SI] -> TTY
;
v_msg: cs: lodsb ;get character
and al,al ;0 = end
jz v_msg9
mov ah,0eh ;TTY output
mov bh,0 ;page 0
int 10h
jmp v_msg
v_msg9: ret
;
; global descriptor table (GDT) for unreal mode
;
db (($+15) and 0fff0h)-$ dup 0ffh ;even 16
gdt: dw gdtend-gdt-1 ;GDT limit
gdtadr: dw gdt,000fh ;linear address of GDT
dw 0
dw 0ffffh,0,9300h,008fh ;4G data segment, accessed
gdtend:
;
; Enter unreal (4GB segment) mode -> change DS,ES selector
;
; based on code in DDJ 7/90
;
getunreal: cli ;disable interrupts
cs: lgdt [gdt] ;load GDT (in data module, writeable)
mov eax,cr0
or al,1 ;enable protected mode
mov cr0,eax
jmp short getunrl2 ;flush queue
getunrl2: mov bx,8 ;selector
mov ds,bx
mov es,bx
and al,0feh ;exit protected mode
mov cr0,eax
ret
;
; get back to normal segments
;
getreal: push cs
pop ds
sti
ret
;
; open flash access
;
rom_open: mov eax,80009050h ;9052 enable flash writes sc172
mov dx,0cf8
out dx,eax
xchg eax,ebx
mov dl,0fe
in al,dx
or al,2 ;enable flash write
xchg eax,ebx
mov dl,0f8
out dx,eax
mov dl,0fe
xchg eax,ebx
out dx,al
; read device ID
call getunreal ;enter unreal mode
mov ebx,rombase
mov byte [ebx+05555],0aa ;software ID
mov byte [ebx+02aaa],055
mov byte [ebx+05555],090
out iowait,al ;short delay
mov ax,[ebx] ;read the device ID
mov byte [ebx],0f0 ;exit ID mode
call getreal
mov [devid],ax
; check device ID
cmp al,0bf ;SST ?
jnz rom_open9 ;no: fail
cmp ah,0b5 ;39SF010
jz rom_open8
cmp ah,0d5 ;39VF010
jz rom_open8
inc byte [rom64] ;set flag for 64KB flash
cmp ah,0b4 ;39SF512
jz rom_open8
cmp ah,0d4 ;39VF512
jz rom_open8
cmp ah,0d6 ;39VF020
jz rom_open8
cmp ah,0d7 ;39VF040
jnz rom_open9
rom_open8:
ret
rom_open9:
mov si,offset msg_fail
jmp barf
;
; close flash access
;
rom_exit: mov eax,80009050h ;9052 disable flash writes sc172
mov dx,0cf8
out dx,eax
xchg eax,ebx
mov dl,0fe
in al,dx
and al,not 2 ;disable flash write
xchg eax,ebx
mov dl,0f8
out dx,eax
mov dl,0fe
xchg eax,ebx
out dx,al
ret
;
; chip erase flash
;
rom_zap: call getunreal ;enter unreal mode
mov ebx,rombase
mov byte [ebx+05555],0aa ;erase setup
mov byte [ebx+02aaa],055
mov byte [ebx+05555],080
mov byte [ebx+05555],0aa ;erase command
mov byte [ebx+02aaa],055
mov byte [ebx+05555],010
mov bx,100 ;wait for 100 ms
call cs_waitbx
mov eax,0ffffffff ;check for erase
mov ecx,08000 ;128KB
mov edi,rombase
a4 repz scasd
jnz rom_open9 ;:failure
jmp getreal
;
; program flash [bufpt] -> [rombase]
;
rom_set: mov esi,[bufpt]
mov edi,rombase
mov ecx,020000 ;128KB
cmp byte [rom64],1 ;64KB flash ?
jnz rom_set2
shr ecx,1 ;yes
add esi,ecx
add edi,ecx
rom_set2: call getunreal
mov ebx,edi ;^base
rom_set3: mov al,[esi] ;data byte
cmp al,0ff
jz rom_set5 ;blank -> skip
mov byte [ebx+05555],0aa ;byte program command
mov byte [ebx+02aaa],055
mov byte [ebx+05555],0a0
mov [edi],al
mov dx,1000 ;time-out
rom_set4: cmp [edi],al ;correct data ?
jz rom_set5 ;:yes
dec dx
jnz rom_set4
jmp rom_open9 ;program failure, bail
rom_set5: inc esi
inc edi
dec ecx
jnz rom_set3 ;:another
jmp getreal
;
; compare flash [bufpt] -> [rombase], carry set if mismatch
;
rom_cmp: mov esi,[bufpt]
mov edi,rombase
mov ecx,020000 ;128KB
cmp byte [rom64],1 ;64KB flash ?
jnz rom_cmp2
shr ecx,1 ;yes
add esi,ecx
add edi,ecx
rom_cmp2: call getunreal
shr ecx,2
rom_cmp3: mov eax,[esi]
cmp [edi],eax
jnz rom_cmp4 ;:failure
lea esi,[esi+4]
lea edi,[edi+4]
dec ecx
jnz rom_cmp3
call getreal
clc
ret
rom_cmp4: call getreal ;failure exit
stc
ret
;
; Wait BX milliseconds - depends on refresh rate !!!
;
; This is used for floppy delays and INT15 function 86.
;
cs_waitbx: inc bx
jmp short cs_wbx8
cs_wbx1: mov cx,62 ;62 refresh cycles per millisecond
cs_wbx2: in al,port61
and al,10h
mov ah,al
cs_wbx3: in al,port61 ;wait for refresh bit to change state
and al,10h
cmp al,ah
jz cs_wbx3
loop cs_wbx2 ;:another iteration
cs_wbx8: dec bx ;another millisecond ?
jnz cs_wbx1
cs_wbx9: ret
;
; stack
;
db (($+100) and 0fff0h)-$ dup 0ffh ;allocate stack
stack1: ;this is end, buffer follows...
;buffer is even 16
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;
; Initialize SC1100 super I/O
;
; (C)2000-2003 Pascal Dornier / PC Engines; All rights reserved.
;
; pd 050227 change serial port init -> DTR, RTS set
; disable COM2 IR UART
SIO_IDX equ 002eh ;SC1100 SIO
AB1BASE equ 0810h ;Access.Bus 1 base
AB2BASE equ 0820h ;Access.Bus 2 base
SWCBASE equ 0860h ;power control base
#if def DISA_SIO
sio_act equ 0 ;don't activate
#else
sio_act equ 1 ;activate device
#endif
;
; early SIO initialization (jumped to by cs_clr)
;
sio_init0:
mov dx,offset SIO_IDX ;SC1100 SIO base
mov al,20h ;SID register sc75 RO
out dx,al
inc dx
in al,dx
dec dx
mov si,offset sio_tab0 ;table
cmp al,0f5h ;verify device ID
jz sio_ini01 ;:ok
#if ! def DISA_SIO
;&&& jmp cs_clr ;loop back if config failed
#endif
sio_ini01: cs: lodsw ;get table entry
out dx,al ;index
inc dx
mov al,ah
out dx,al ;data
dec dx
cmp si,offset sio_tab0e ;end of table ?
jb sio_ini01 ;:no
#if !def DISA_SIO
; configure RTC
mov al,0dh
out cm_idx,al
in al,cm_dat
in al,cm_dat
; set SWC registers (I/O mapped) from table
mov si,offset swctab
mov dx,swcbase
sio_swc: cs: lodsb
out dx,al
inc dx
cmp si,offset swctab9
jb sio_swc
#if def CONSOLE
; init COM for 9600 8N1
mov dx,CONSOLE+3
mov al,80h ;DLAB=1: access baud rate register
out dx,al
mov al,0 ;9600 baud
mov dl,low(CONSOLE+1)
out dx,al
#if def CFG_BAUD
mov al,byte [cs:CFG_OFS+cfg_baud] ;get baud rate
cmp al,3 ;38400 baud
jz sio_baud
cmp al,2 ;57600 baud
jz sio_baud
cmp al,12
jz sio_baud
mov al,CONRATE ;set default rate otherwise
sio_baud:
#else
mov al,CONRATE ;set default rate
#endif
mov dl,low(CONSOLE)
out dx,al
mov al,COM_INIT and 1Fh ;set parameters
mov dl,low(CONSOLE+3)
out dx,al
mov al,0 ;disable interrupts
mov dl,low(CONSOLE+1)
out dx,al
mov al,3 ;enable RTS, DTR
mov dl,low(CONSOLE+4)
out dx,al
#endif
#endif
#if def sio2_init
jmp sio2_init ;init second SIO
#else
ret
#endif
;
; late SIO initialization
;
sio_init: ret
;
; NS SC1100 SIO configuration
;
sio_tab0: ;db 020,0F5 ;SID register sc73 RO
db 021,001 ;SIOCF1 config sc73
;global enable
; db 022,002 ;SIOCF2 config sc73
; db 027,001 ;SRID revision sc75 R
db 007,000 ;RTC
db 060,000 ;base MSB
db 061,070 ;base LSB
db 062,000 ;ext base MSB
db 063,072 ;ext base LSB
db 070,008 ;RTC int
db 071,000 ;RTC int type
db 0F0,000 ;RLR RAM lock sc75
;no effect
db 0F1,000 ;DOMAO month alarm offset sc75
db 0F2,000 ;MAO month alarm offset sc75
db 0F3,000 ;CENO century offset sc75
db 030,000 ;disable
db 030,sio_act ;enable
db 007,005 ;Access.bus 1
db 060,high(AB1BASE) ;Base MSB
db 061,low(AB1BASE) ;Base LSB
db 070,000 ;AC1 int
db 071,003 ;AC1 int type
db 0F0,004 ;AC1 config sc78
;enable internal pu
db 030,000 ;disable
db 030,001 ;enable
db 007,006 ;Access.bus 2
db 060,high(AB2BASE) ;Base MSB
db 061,low(AB2BASE) ;Base LSB
db 070,000 ;AC2 int
db 071,003 ;AC2 int type
db 0F0,004 ;AC2 config sc78
;enable internal pu
db 030,000 ;disable
db 030,001 ;enable
db 007,001 ;SWC system wake-up control
db 060,high(SWCBASE) ;Base MSB
db 061,low(SWCBASE) ;Base LSB
db 070,000 ;int
db 071,003 ;int type
db 030,sio_act ;disable
db 007,008 ;COM1
db 060,003 ;Base MSB
db 061,0F8 ;Base LSB
db 070,004 ;COM1 int
db 071,003 ;COM1 int type
db 0F0,082 ;COM1 config sc79
;normal power, enable bank switch
db 030,sio_act ;Activate COM1
db 007,002 ;COM2/IR
db 060,002 ;Base MSB
db 061,0F8 ;Base LSB
db 070,003 ;IR int
db 071,003 ;IR int type
db 074,004 ;IR RX_DMA
db 075,004 ;IR TX_DMA
db 0F0,082 ;IR config sc77
;normal power, enable bank switch
db 030,0 ;Activate IR -> disable
sio_tab0e: ;end of table
;
; SWC init table
;
swctab: db 000,000 ;00 WKSR wake status sc94
db 001,000 ;01 WKC wake control sc94
db 002,001 ;02 WKCFG wake config sc94 -> bank 1
; db 003,000 ;03 IRWCR CEIR wake control sc95
; db 005,000 ;05 IRWAD wake address sc95
db 006,000 ;06 IRWAM wake address mask sc95
; db 007,000 ;07 ADSR address shift sc95
; db 008,000 ;08 IRWTR0L wake range low sc95
; db 009,000 ;09 IRWTR0H wake range high sc95
; db 00A,000 ;0A IRWTR1L wake range low sc96
; db 00B,000 ;0B IRWTR1H wake range high sc96
; db 00C,000 ;0C IRWTR2L wake range low sc96
; db 00D,000 ;0D IRWTR2H wake range high sc96
; db 00E,000 ;0E IRWTR3L wake range low sc96
; db 00F,000 ;0F IRWTR3H wake range high sc96
swctab9:
;
; serial port console
;
#if def CONSOLE
con_init: cmp byte [cs:CFG_OFS+cfg_cons],0 ;console disable ?
jz con_init9
; second entry, unconditional enable
con_init2:
xor ax,ax
mov ds,ax
; hook serial interrupt
#if def CONINT
cli ;set INT 3 vector = COM2
#if CONINT = 3
mov word [11*4],con_int
mov word [11*4+2],cs
#endif
#if CONINT = 4
mov word [12*4],con_int
mov word [12*4+2],cs
#endif
#if CONINT = 5
mov word [13*4],con_int
mov word [13*4+2],cs
#endif
sti
mov dx,CONSOLE
in al,dx ;clear receive buffer
out iowait,ax
mov dl,low(CONSOLE+1)
mov al,1 ;enable receive interrupt
out dx,al
out iowait,ax
mov dl,low(CONSOLE+4) ;enable interrupt driver
in al,dx
or al,8
out dx,al
in al,pic0+1 ;enable serial interrupt (int 3)
#if CONINT = 3
and al,0f7
#endif
#if CONINT = 4
and al,0ef
#endif
#if CONINT = 5
and al,0df
#endif
out iowait,ax
out pic0+1,al
#endif
mov byte [m_conkey],0 ;clear key buffer
mov byte [m_console],1 ;set serial console flag
con_init9:
ret
#endif
BIN
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;
; TinyBIOS, configured for National SC1100, PC Engines WRAP board
;
; (C)1998-2003 Pascal Dornier / PC Engines; All rights reserved.
;
; v1.11
; pd 051108 extend PCI reset pulse width
;
; v1.10
; pd 050625 add option for slower DRAM clock
;
; v1.08
; pd 050502 be less picky about IDE device IDs
;
; v1.07
; pd 050417 add delay on warm start (protect CF integrity)
; add serial console disable option
;
; v1.06
; pd 050227 fix serial port configuration; neutral message on
; WRAP setup; add USB, PXE configuration option;
; Int 15 function E820 memory map.
; Disable COM2 IR UART.
;
; v1.05
; pd 041021 add platform ID at end
;
; v1.03
; pd 040705 Configure latency + line size on ALL slots (incl. 68).
;
; v1.02
; pd 040315 Add PCI reset on reset entry.
;
; v1.01
; pd 040220 Change to generic message, leave space for patch
; pd 040220 Add USB_EN option.
; start offset
STARTOFS equ 09000 ;start offset, must be multiple of 256
CFG_OFS equ 08000 ;start of config block
db STARTOFS dup 0 ;(start data cut out by BIOSSUM.EXE)
#if def CFG_OFS
include wrap_cfg.8 ;include config offsets
#endif
; platform specific options
WRAP1C: ;select new interrupt mapping
WRAP: ;select WRAP platform
;USB_EN: ;enable USB controller -> now configured
;by cfg_usb
ROM_BEG equ 0c800 ;start of option ROM scan
ROM_END equ 0f000 ;end of option ROM scan
PCI_NORST equ 090 ;don't reset 5530
PCI_NORST2 equ 098 ;don't reset USB
PCI_NORST3 equ 000 ;don't reset GX1
; PCI options
INTA equ 9 ;PCI interrupt assignment
INTB equ 10 ;also see PCI_TAB
INTC equ 11
INTD equ 12
INT0 equ 0ff ;no interrupt assigned
; general options
;BOOTBEEP: ;enables beep on bootup
;DEBUG: ;debug mode (Int 13 trace etc).
;QUICKMEM: ;no memory test (fill only)
MTEST_1PASS: ;quicker memory test (1 pass)
; hard disk, boot options
FORCE_LBA equ 1024 ;use LBA if more than x cylinders
;BOOT_AC: ;Boot A: first, then C:
;comment out for C: then A:
;HD_WAIT equ 20 ;Hard disk wait, max. x seconds
;HD_ENA equ 0 ;don't check HDD status before x seconds
HD_INFO: ;display hard disk info
HDD_LOOSE: ;don't be picky about device ID
HDD_EDD: ;enable EDD support
HDD_LBA: ;enable LBA support
HDD_NOSLAVE: ;don't look (and wait) for slave device
;HD_TIME equ 080 ;commented out = HDD power down disabled
;0 = code included, but no timeout
;1..240 = timeout x * 5 s units
;241..251 = timeout (x-240)*30 min
; keyboard options
NO_KBC: ;don't fail if KBC not present
INT15_24: ;option: A20 gate functions
;LED_UPDATE: ;Define to enable keyboard LED updates
;(NumLock, CapsLock, ScrollLock).
;Not recommended for real-time apps.
; serial port options
CONSOLE equ 03F8 ;serial port for console = COM1
CONRATE equ 12 ;default baudrate
;3 = 38400, 12 = 9600 - override by
;CFG_BAUD
CONINT equ 4 ;interrupt for console
COM_NO2400: ;prevent DOS 2400 baud setting...
;
; Signon prompt (must be at start of binary, 4KB step,
; for patch utility to work)
;
copysig: db "##" ;
copysum: db 0 ;checksum
copyrt:
#if def WRAP1C
db "PC Engines WRAP.1C/1D/1E v1.11",13,10,0
#else
db "PC Engines WRAP.1A/1B v1.11",13,10,0
#endif
db copysig+256-$ dup (0) ;pad to 256 byte limit
include ..\message.8
;
; Include files
;
include ..\equ.8 ;general equates
include gxm.8 ;SC1200 chipset / system specific code
include sio.8 ;super I/O initialization
include post.8 ;POST (with local modifications)
include ..\post2.8 ;POST routines
include ..\debug.8 ;Debug routines, comment out
include ..\vid.8 ;video BIOS
include ..\int1x.8 ;miscellaneous interrupts
include ..\fdd.8 ;floppy BIOS
include ..\hdd.8 ;hard disk BIOS
include ..\com.8 ;serial BIOS
include ..\kbd.8 ;keyboard BIOS
include ..\kbtab.8 ;keyboard table
include ..\lpt.8 ;printer BIOS
include ..\rtc.8 ;timer / RTC BIOS
include ..\pci.8 ;PCI BIOS
include ..\pcipnp.8 ;PCI plug & play
#if def PS2MOUSE
include ..\ps2mous.8 ;PS/2 mouse BIOS
#endif
#if def CFG_OFS
include wrap_set.8 ;WRAP setup module
include wrap_xm.8 ;WRAP xmodem module
#endif
;
; OEM decision: verify diagnostic flags to decide
; whether to boot or display error messages
;
decide: mov dx,GPIOBASE+0 ;GPDO0 GPIO out 0 sc196
in eax,dx
or eax,040008 ;turn off LED2/G3 and LED3/G18
out dx,eax
mov dx,LPCBASE+010 ;LAD_EN LPC address enable sc204
in eax,dx
and eax,07FFF ;disable LPC flash
out dx,eax
mov ax,04008 ;PCI latency, cache line size
mov ebx,08000680C ;set for miniPCI + LAN
decide2: call pci_setw ;pd 040705 fix
inc bh
cmp bh,090
jb decide2
#if def wrap_set
call wrap_set
#endif
ret
;
; BIOS writeable configuration data
;
include ..\data.8
;
; INT 1A legacy entry point
;
db (0fe6e-$) dup 0ffh ;explicitly documented in the
jmp int1a ;PCI BIOS spec.
;
; PCI interrupt assignment table
;
PCI_TAB: db INT0,INT0,INT0,INT0 ;00 north bridge
db INT0,INT0,INT0,INT0 ;08
db INT0,INT0,INT0,INT0 ;10
db INT0,INT0,INT0,INT0 ;18
db INT0,INT0,INT0,INT0 ;20
db INT0,INT0,INT0,INT0 ;28
db INT0,INT0,INT0,INT0 ;30
db INT0,INT0,INT0,INT0 ;38
db INT0,INT0,INT0,INT0 ;40
db INT0,INT0,INT0,INT0 ;48
db INT0,INT0,INT0,INT0 ;50
db INT0,INT0,INT0,INT0 ;58
db INT0,INT0,INT0,INT0 ;60
#if def WRAP1C
db INTD,INTA,INT0,INT0 ;68 AD23 miniPCI J6
db INTB,INT0,INT0,INT0 ;70 AD24 LAN U13
db INTA,INT0,INT0,INT0 ;78 AD25 LAN U12
db INTC,INT0,INT0,INT0 ;80 AD26 LAN U11
db INTA,INTD,INT0,INT0 ;88 AD27 miniPCI J5
#else
db INT0,INT0,INT0,INT0 ;68
db INTD,INTA,INT0,INT0 ;70 AD24 miniPCI J6
db INTB,INT0,INT0,INT0 ;78 AD25 LAN U12
db INTC,INT0,INT0,INT0 ;80 AD26 LAN U11
db INTA,INTD,INT0,INT0 ;88 AD27 miniPCI J5
#endif
db INTA,INTB,INTC,INTD ;90 AD28 south bridge
db INTA,INTB,INTC,INTD ;98 AD29 USB
db INT0,INT0,INT0,INT0 ;remaining devices
pci_tab9: ;end of table
include ..\tables.8 ;ISA initialization tables
safeorg 0ffd0
db "PC Engines WRAP.1",0
include ..\reset.8 ;reset vector
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;
; TinyBIOS, configured for National SC1100, PC Engines WRAP board
;
; (C)1998-2003 Pascal Dornier / PC Engines; All rights reserved.
;
; v1.11
; pd 051108 extend PCI reset pulse width
;
; v1.10
; pd 050625 add option for slower DRAM clock
;
; v1.09
; pd 050521 allow USB also for WRAP.2C (will add on WRAP.2D)
; some customers use this for timing.
;
; v1.08
; pd 050502 be less picky about IDE device IDs
; disable IR UART
;
; v1.07
; pd 050417 add delay on warm start (protect CF integrity)
; add serial console disable option
;
; v1.06
; pd 050227 fix serial port configuration; neutral message on
; WRAP setup; add PXE configuration option;
; Int 15 function E820 memory map.
; disable COM2 IR UART.
;
; v1.05
; pd 041021 add platform ID at end of flash
; pd 041011 fix PMR setting for GPIO14 (DOGFOOD pin)
;
; v1.04
; pd 040817 add support for 39VF020/39VF040 flash
;
; v1.03
; pd 040705 Configure latency + line size on ALL slots (incl. 68).
;
; start offset
STARTOFS equ 09000 ;start offset, must be multiple of 256
CFG_OFS equ 08000 ;start of config block
db STARTOFS dup 0 ;(start data cut out by BIOSSUM.EXE)
#if def CFG_OFS
include wrap_cfg.8 ;include config offsets
#endif
; platform specific options
;&&&PCI_WAIT: ;add PCI startup delay
WRAP2A: ;select new interrupt mapping
WRAP: ;select WRAP platform
ROM_BEG equ 0c800 ;start of option ROM scan
ROM_END equ 0f000 ;end of option ROM scan
PCI_NORST equ 090 ;don't reset 5530
PCI_NORST2 equ 098 ;don't reset USB
PCI_NORST3 equ 000 ;don't reset GX1
; PCI options
INTA equ 9 ;PCI interrupt assignment
INTB equ 10 ;also see PCI_TAB
INTC equ 11
INTD equ 12
INT0 equ 0ff ;no interrupt assigned
; general options
;BOOTBEEP: ;enables beep on bootup
;DEBUG: ;debug mode (Int 13 trace etc).
;QUICKMEM: ;no memory test (fill only)
MTEST_1PASS: ;quicker memory test (1 pass)
; hard disk, boot options
FORCE_LBA equ 1024 ;use LBA if more than x cylinders
;BOOT_AC: ;Boot A: first, then C:
;comment out for C: then A:
;HD_WAIT equ 20 ;Hard disk wait, max. x seconds
;HD_ENA equ 0 ;don't check HDD status before x seconds
HD_INFO: ;display hard disk info
HDD_LOOSE: ;don't be picky about device ID
HDD_EDD: ;enable EDD support
HDD_LBA: ;enable LBA support
HDD_NOSLAVE: ;don't look (and wait) for slave device
;HD_TIME equ 080 ;commented out = HDD power down disabled
;0 = code included, but no timeout
;1..240 = timeout x * 5 s units
;241..251 = timeout (x-240)*30 min
; keyboard options
NO_KBC: ;don't fail if KBC not present
INT15_24: ;option: A20 gate functions
;LED_UPDATE: ;Define to enable keyboard LED updates
;(NumLock, CapsLock, ScrollLock).
;Not recommended for real-time apps.
; serial port options
CONSOLE equ 03F8 ;serial port for console = COM1
CONRATE equ 12 ;default baudrate
;3 = 38400, 12 = 9600 - override by
;CFG_BAUD
CONINT equ 4 ;interrupt for console
COM_NO2400: ;prevent DOS 2400 baud setting...
;
; Signon prompt (must be at start of binary, 4KB step,
; for patch utility to work)
;
copysig: db "##" ;
copysum: db 0 ;checksum
copyrt: db "PC Engines WRAP.2B/2C v1.11",13,10,0
db copysig+256-$ dup (0) ;pad to 256 byte limit
include ..\message.8
;
; Include files
;
include ..\equ.8 ;general equates
include gxm.8 ;SC1200 chipset / system specific code
#if def DRAMOPT
include sdramopt.8 ;SC1200 SDRAM timing optimization
include i2c.8 ;SC1200 I2C routines
#endif
include sio.8 ;super I/O initialization
include post.8 ;POST / local modifications
include ..\post2.8 ;POST routines
include ..\debug.8 ;Debug routines, comment out
include ..\vid.8 ;video BIOS
include ..\int1x.8 ;miscellaneous interrupts
include ..\fdd.8 ;floppy BIOS
include ..\hdd.8 ;hard disk BIOS
include ..\com.8 ;serial BIOS
include ..\kbd.8 ;keyboard BIOS
include ..\kbtab.8 ;keyboard table
include ..\lpt.8 ;printer BIOS
include ..\rtc.8 ;timer / RTC BIOS
include ..\pci.8 ;PCI BIOS
include ..\pcipnp.8 ;PCI plug & play
#if def PS2MOUSE
include ..\ps2mous.8 ;PS/2 mouse BIOS
#endif
#if def CFG_OFS
include wrap_set.8 ;WRAP setup module
include wrap_xm.8 ;WRAP xmodem module
#endif
;
; OEM decision: verify diagnostic flags to decide
; whether to boot or display error messages
;
decide: mov dx,GPIOBASE+0 ;GPDO0 GPIO out 0 sc196
in eax,dx
or eax,040008 ;turn off LED2/G3 and LED3/G18
out dx,eax
mov dx,LPCBASE+010 ;LAD_EN LPC address enable sc204
in eax,dx
and eax,07FFF ;disable LPC flash
out dx,eax
mov ax,04008 ;PCI latency, cache line size
mov ebx,08000680C ;set for miniPCI + LAN
decide2: call pci_setw ;pd 040705 fix
inc bh
cmp bh,090
jb decide2
#if def wrap_set
call wrap_set
#endif
ret
;
; BIOS writeable configuration data
;
include ..\data.8
;
; INT 1A legacy entry point
;
db (0fe6e-$) dup 0ffh ;explicitly documented in the
jmp int1a ;PCI BIOS spec.
;
; PCI interrupt assignment table
;
PCI_TAB: db INT0,INT0,INT0,INT0 ;00 north bridge
db INT0,INT0,INT0,INT0 ;08
db INT0,INT0,INT0,INT0 ;10
db INT0,INT0,INT0,INT0 ;18
db INT0,INT0,INT0,INT0 ;20
db INT0,INT0,INT0,INT0 ;28
db INT0,INT0,INT0,INT0 ;30
db INT0,INT0,INT0,INT0 ;38
db INT0,INT0,INT0,INT0 ;40
db INT0,INT0,INT0,INT0 ;48
db INT0,INT0,INT0,INT0 ;50
db INT0,INT0,INT0,INT0 ;58
db INT0,INT0,INT0,INT0 ;60
#if def WRAP2A
db INTD,INTA,INT0,INT0 ;68 AD23 miniPCI J6
db INTB,INT0,INT0,INT0 ;70 AD24 LAN U13
db INTA,INT0,INT0,INT0 ;78 AD25 LAN U12
db INTC,INT0,INT0,INT0 ;80 AD26 LAN U11
db INTA,INTD,INT0,INT0 ;88 AD27 miniPCI J5
#else
db INT0,INT0,INT0,INT0 ;68
db INTD,INTA,INT0,INT0 ;70 AD24 miniPCI J6
db INTB,INT0,INT0,INT0 ;78 AD25 LAN U12
db INTC,INT0,INT0,INT0 ;80 AD26 LAN U11
db INTA,INTD,INT0,INT0 ;88 AD27 miniPCI J5
#endif
db INTA,INTB,INTC,INTD ;90 AD28 south bridge
db INTA,INTB,INTC,INTD ;98 AD29 USB
db INT0,INT0,INT0,INT0 ;remaining devices
pci_tab9: ;end of table
include ..\tables.8 ;ISA initialization tables
safeorg 0ffd0
db "PC Engines WRAP.2",0
include ..\reset.8 ;reset vector
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a386 wrap_cfg.8 wrap_cfg.bin
a386 wrap2.8 wrap2.bin
..\tool\biossum wrap2.bin wrap2.abs
..\tool\cat pxe.bin ..\fill32.bin ..\fill32.bin wrap_cfg.bin wrap2.abs > wrap2.rom
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;
; WRAP configuration block, rewritten by setup module
;
; pd 050625 added cfg_dram
; pd 050417 added cfg_cons
; pd 030807 initial code
;
cfg_baud equ 0 ;offset for baud rate
cfg_lba equ 2 ;offset for LBA / CHS selection
cfg_usb equ 4 ;offset for USB enable / disable
cfg_pxe equ 6 ;offset for PXE enable / disable
cfg_cons equ 8 ;offset for console enable / disable
cfg_dram equ 10 ;offset for DRAM speed config
cfg_size equ 12 ;size of config block (dword multiple)
#if ! def CFG_OFS ;set CFG_OFS in BIOS main file !
org cfg_baud
dw 3 ;3 = 38400, 12 = 9600, 2 = 57600
org cfg_lba ;default to 9600 baud if other value
dw 0 ;1..1024 = threshold for LBA mode
;default to CHS if other value
org cfg_usb ;default to disable
dw 0 ;0000 = disable, FFFF = enable
org cfg_pxe ;default to disable
dw 0 ;0000 = disable, FFFF = enable
org cfg_cons ;default to enable
dw 0ffff ;0000 = disable, FFFF = enable
org cfg_dram ;default to 2.5x clock divider
dw 0 ;0000 = 2.5x, FFFF = 3.0x
db (01000-$) dup (0ff) ;pad the rest of this block
#endif
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;
; WRAP setup module - called by DECIDE
;
; This currently supports SST 39VF010 / 39VF512.
;
; pd 050625 add DRAM config
; pd 050521 allow USB for WRAP.2C
; pd 050417 add CONS option
; pd 050227 change to neutral message, add USB & PXE options
; pd 040817 add 39VF020 (not tested) / 39VF040 support
; pd 040713 add network boot option (N key)
; pd 040511 add 57600 baud option
;
wrap_set: xor ax,ax ;copy config block from flash to
mov ds,ax ;temp buffer
mov es,ax
mov si,cfg_ofs
mov di,tmp_buf
ws_copy: cs: movsw
cmp di,tmp_buf+cfg_size
jb ws_copy
; if serial console disabled: look for pushbutton
#if def WRAP1C
test byte [tmp_buf+cfg_cons],1
jnz wrap_se1 ;:normal console mode
mov dx,GPIOBASE+20 ;check button
in ax,dx
test ax,0100h ;bit 8 = 0 ?
jnz wrap_se1 ;:not pressed
call con_init2 ;enable serial console
jmp wrap_se2 ;enter setup
#endif
wrap_se1: mov ah,1 ;any key in buffer ?
int 16h
jnz ws_flush ;yes - eat them, see if setup mode
ret
net_boot: int 18h ;call network boot first
ret ;(not installed: message)
ws_flush: call ws_getc ;get a key, convert to upper case
cmp al,"N" ;network boot ?
jz net_boot ;:yes
cmp al,"S" ;setup ?
jnz wrap_se1 ;no: eat
wrap_se2: mov si,offset ws_msgin ;display start message
call v_msg
ws_main: call ws_menu ;display menu
call ws_getc ;get keystroke
cmp al,"9" ;9600 baud ?
jz ws_96
cmp al,"3" ;38400 baud ?
jz ws_38
cmp al,"5" ;57600 baud ?
jz ws_56
cmp al,"L" ;LBA mode ?
jz ws_lba
cmp al,"C" ;CHS mode ?
jz ws_chs
cmp al,"U" ;USB toggle ?
jz ws_usb
cmp al,"D" ;DRAM toggle ?
jz ws_dram
cmp al,"E" ;PXE toggle ?
jz ws_pxe
cmp al,"R" ;console toggle ?
jz ws_cons
cmp al,"X" ;XMODEM upload ?
jz ws_xmo
cmp al,"Q" ;exit ?
jnz ws_main ;no: loop back
mov si,offset ws_msgyn
cmp word [tmp_buf+cfg_cons],0
jnz ws_ex0
mov si,offset ws_msgr2 ;display serial console warning
ws_ex0: call v_msg
ws_ex1: call ws_getc ;get keystroke
cmp al,"N"
jz ws_rst ;no -> exit immediately
cmp al,"Y"
jnz ws_ex1
call ws_prog ;write config data to flash
;
; force a system reset
;
ws_rst: mov ebx,080009044 ;reset control sc170
mov al,0f ;system wide reset
call pci_setb
ws_rst2: hlt ;wait for reset to kick in
jmp ws_rst2
;
; set 9600 baud mode
;
ws_96: mov word [tmp_buf+cfg_baud],12
jmp ws_main
;
; set 38400 baud mode
;
ws_38: mov word [tmp_buf+cfg_baud],3
jmp ws_main
;
; set 57600 baud mode
;
ws_56: mov word [tmp_buf+cfg_baud],2
jmp ws_main
;
; set LBA mode
;
ws_lba: mov word [tmp_buf+cfg_lba],1
jmp ws_main
;
; set CHS mode
;
ws_chs: mov word [tmp_buf+cfg_lba],0
jmp ws_main
;
; toggle USB mode
;
ws_usb: not word [tmp_buf+cfg_usb]
jmp ws_main
;
; toggle DRAM mode
;
ws_dram: not word [tmp_buf+cfg_dram]
jmp ws_main
;
; toggle serial console mode
;
ws_cons: not word [tmp_buf+cfg_cons]
jmp ws_main
;
; toggle PXE mode
;
ws_pxe: not word [tmp_buf+cfg_pxe]
jmp ws_main
;
; XMODEM upload
;
ws_xmo: xor ax,ax ;&&&
mov ds,ax ;&&&
mov dword [xm_pt],010000000 ;destination 1000:0000
call xm_rec ;receive file
jb ws_main ;:error
mov ax,01000h ;check header
mov es,ax
cmp word [es:0],'BT' ;signature: TB
jnz ws_main ;no: don't execute
les di,[xm_pt] ;get pointer to end of upload
;(for length verification)
call 01000:0002 ;execute uploaded code
jmp ws_main ;back to menu
;
; display menu
;
ws_menu: mov ax,"9" ;not 9600 baud
mov bl,[tmp_buf+cfg_baud]
cmp bl,3 ;38400 baud ?
jz ws_menu2
cmp bl,2 ;57600 baud ?
jz ws_menu2
mov ah,0ff ;9600 baud default
ws_menu2: mov si,offset ws_msg96
push ax ;save status
call ws_item ;display item
pop ax
mov ax,"3"
cmp byte [tmp_buf+cfg_baud],3
jnz ws_menu2a
not ah
ws_menu2a:
mov si,offset ws_msg38
call ws_item
mov ax,"5"
cmp byte [tmp_buf+cfg_baud],2
jnz ws_menu2b
not ah
ws_menu2b:
mov si,offset ws_msg56
call ws_item
mov ax,[tmp_buf+cfg_lba]
and ax,ax
jz ws_menu3
mov ah,0ff ;LBA mode active
ws_menu3: push ax ;save for LBA
not ah ;CHS mode first
mov al,"C"
mov si,offset ws_msgch
call ws_item
pop ax
mov al,"L" ;LBA item
mov si,offset ws_msglb
call ws_item
mov ax,[tmp_buf+cfg_pxe]
mov al,"E" ;PXE item
mov si,offset ws_msgpx
call ws_item
mov ax,[tmp_buf+cfg_usb]
mov al,"U" ;USB item
mov si,offset ws_msgu1
call ws_item
mov ax,[tmp_buf+cfg_dram]
mov al,"D" ;DRAM item
mov si,offset ws_msgd1
call ws_item
mov ax,[tmp_buf+cfg_cons]
mov al,"R" ;serial console
mov si,offset ws_msgr1
call ws_item
mov ax,"X"
mov si,offset ws_msgup
call ws_item
mov ax,"Q"
mov si,offset ws_msgex ;fall through
;
; display menu item AL = character, AH = 00 -> (), AH = FF -> [ ]
; SI = text
;
ws_item: push ax
mov al,"("
cmp ah,0
jz ws_item2
mov al,"*" ;highlight active with *
ws_item2: call putc
pop ax
push ax
call putc ;display character of menu item
pop ax
mov al,")"
cmp ah,0
jz ws_item3
mov al,"*" ;highlight active with *
ws_item3: call putc
jmp v_msg ;display string
;
; get a keystroke, convert to upper case
;
ws_getc: mov ah,0
int 16h
cmp al,"a"
jb ws_getc2
cmp al,"z"
ja ws_getc2
sub al,20h
ws_getc2: ret
;
; Texts
;
ws_msgin: db 10,"BIOS setup:",13,10,10,0
ws_msg96: db " 9600 baud ",0
ws_msg38: db " 38400 baud ",0
ws_msg56: db " 57600 baud",13,10,0
ws_msgch: db " CHS mode ",0
ws_msglb: db " LBA mode ",13,10,0
ws_msgu1: db " USB enable ",13,10,0
ws_msgr1: db " Serial console enable ",13,10,0
ws_msgd1: db " Conservative DRAM timing ",13,10,0
ws_msgpx: db " Etherboot enable ",13,10,0
ws_msgup: db " Xmodem upload ",0
ws_msgex: db " Quit",13,10,0
#if def WRAP1C
ws_msgr2: db 10,"Warning: Serial console disable selected.",13,10
db "To re-enable serial console and enter setup, ",13,10
db "keep switch pressed during power up.",13,10
#else
ws_msgr2: db 13,10,10,"WARNING: Serial console disable selected.",13,10
db "The only way to re-enable serial console will be to",13,10
db "boot from CF card and reprogram the BIOS !",13,10
#endif
; message continued !
ws_msgyn: db "Save changes Y/N ?",0
ws_msgpg: db 13,10,"Writing setup to flash... ",0
ws_msgok: db "OK",13,10,0
ws_msgfa: db "FAIL",13,10,0
cfg_128k equ 0fffe0000 ;128KB ROM base
cfg_rom equ 0ffff0000 ;64KB ROM base
cfg_phys equ cfg_rom+CFG_OFS ;physical address of config block
xm_base equ tmp_buf+cfg_size ;base for xmodem variables
;
; program flash config block
;
; note: DS / ES changed to unreal mode
;
ws_prog: mov si,offset ws_msgpg
call v_msg
call rom_open ;look for flash
jb ws_prog8 ;:error
mov edi,cfg_phys
call rom_era ;erase block
jb ws_prog8 ;:error
mov esi,tmp_buf
mov edi,cfg_phys
mov ecx,cfg_size
call rom_set ;program data
jb ws_prog8 ;:error
mov esi,tmp_buf
mov edi,cfg_phys
mov cx,cfg_size / 4
call rom_cmp ;verify data
mov si,offset ws_msgok
jnb ws_prog9
ws_prog8: mov si,offset ws_msgfa ;fail message
ws_prog9: call v_msg
jmp rom_exit ;close flash access
;
; open flash access
;
rom_open: mov ebx,80009052h ;9052 enable flash writes sc172
call pci_getb
or al,2 ;enable flash write
call pci_setb
; read device ID
call getunreal ;enter unreal mode
mov ebx,cfg_rom
mov byte [ebx+05555],0aa ;software ID
mov byte [ebx+02aaa],055
mov byte [ebx+05555],090
out iowait,al ;short delay
mov ax,[ebx] ;read the device ID
mov byte [ebx],0f0 ;exit ID mode
cmp ax,0d5bf ;39VF010 ?
jz rom_open9 ;yes: ok
cmp ax,0d4bf ;39VF512 ?
jz rom_open9 ;yes: ok
cmp ax,0d6bf ;39VF020 ?
jz rom_open9 ;yes: ok
cmp ax,0d7bf ;39VF040 ?
jz rom_open9
rom_open8: stc ;error exit
rom_open9: ret
;
; erase setup
;
rom_clr: call getunreal
mov ebx,cfg_128k
mov byte [edi+05555],0aa ;erase setup
mov byte [edi+02aaa],055
mov byte [edi+05555],080
mov byte [edi+05555],0aa ;erase command
mov byte [edi+02aaa],055
ret
;
; chip erase flash
;
rom_zap: call rom_clr ;erase setup
mov edi,ebx ;(cfg_128k)
mov byte [edi+05555],010 ;chip erase command
mov bx,100 ;wait for 100 ms
call cs_waitbx
mov ecx,08000 ;128KB
rom_zap2: xor eax,eax ;check for erase
dec eax
a4 repz scasd
jnz rom_open8 ;:failure
clc
ret
;
; block erase flash [edi]
;
rom_era: call rom_clr ;erase setup
mov byte [edi],030 ;sector erase command @ sector address
mov bx,25 ;wait for 25 ms
call cs_waitbx
mov ecx,0400 ;4 KB
jmp rom_zap2 ;check for erase
;
; program flash [esi] -> [edi] (ecx bytes)
;
rom_set: call getunreal
mov ebx,cfg_128k ;base for command registers
rom_set3: mov al,[esi] ;data byte
cmp al,0ff
jz rom_set5 ;blank -> skip
mov byte [ebx+05555],0aa ;byte program command
mov byte [ebx+02aaa],055
mov byte [ebx+05555],0a0
mov [edi],al
mov dx,1000 ;time-out
rom_set4: cmp [edi],al ;correct data ?
jz rom_set5 ;:yes
dec dx
jnz rom_set4
jmp rom_open9 ;program failure, bail
rom_set5: inc esi
inc edi
dec ecx
jnz rom_set3 ;:another
clc ;ok exit
ret
;
; compare flash [esi],[edi] (cx dwords)
;
; must be dword multiples
;
rom_cmp: call getunreal
rom_cmp2: mov eax,[esi]
cmp [edi],eax
jnz rom_open8 ;:failure
lea esi,[esi+4]
lea edi,[edi+4]
dec cx
jnz rom_cmp2
clc
ret ;ok exit
;
; close flash access
;
rom_exit: mov eax,80009052h ;9052 disable flash writes sc172
call pci_getb
and al,not 2 ;disable flash write
call pci_setb
xor ax,ax ;restore segments
mov ds,ax
mov es,ax
ret
+332
View File
@@ -0,0 +1,332 @@
;
; WRAP BIOS update - for Xmodem upload
;
; pd 030807, 030812
; pd 050625 add 39VF040
;
rombase equ 0fffe0000
CONSOLE equ 03f8
port61 equ 061
iowait equ 0eb
org 0
db "TB" ;signature
entry: jmp start
;
; output AL to serial port
;
xm_out: push dx
push ax
mov dx,CONSOLE+5
xm_out1: in al,dx ;wait for transmit ready
out iowait,ax
test al,40h
jz xm_out1
mov dl,low(CONSOLE)
pop ax
out dx,al
pop dx
ret
;
; display message [cs:si]
;
v_msg1: call xm_out
v_msg: cs: lodsb
cmp al,0
jnz v_msg1
ret
;
; variables
;
even
bufpt: dd 0 ;buffer pointer
devid: dw 0 ;device ID
file: dw 0 ;file handle
bufseg: dw 0 ;buffer segment
curseg: dw 0 ;current segment
count: db 4 ;number of 32KB blocks to be read
rom64: db 0 ;1 = 64KB flash
msg_strt: db "WRAP flash update",13,10,0
msg_len: db "Invalid image length",13,10,0
msg_open: db "Flash ID",0
msg_fail: db " - FAIL !",13,10,0
msg_zap: db 13,10,"Erase",0
msg_set: db " Program",0
msg_cmp: db " Verify",0
msg_ok: db 13,10,"Flash updated successfully.",13,10,0
;
; main code
;
start: cld
push cs
pop ds
mov si,offset msg_strt
call v_msg
mov si,offset msg_len
mov ax,es ;verify image length
cmp ax,03000
jnz barf ;:bad
cmp di,buf
jb barf
; set segment values
xor eax,eax ;set buffer segment
mov ax,cs
shl eax,4 ;-> physical
add eax,offset buf
mov [bufpt],eax
shr eax,4 ;-> segment
mov [bufseg],ax
mov [curseg],ax
xor eax,eax ;set GDT physical address
mov ax,cs
shl eax,4
add eax,offset gdt
mov dword [gdtadr],eax
mov si,offset msg_open ;look for flash
call v_msg
call rom_open ;read device ID
jb barf
mov si,offset msg_zap ;erase flash
call v_msg
call rom_zap
jb barf
mov si,offset msg_set ;program flash
call v_msg
call rom_set
jb barf
mov si,offset msg_cmp ;verify flash
call v_msg
call rom_cmp
jb barf
mov si,offset msg_ok ;success message
barf: call v_msg
call rom_exit ;write-protect flash
xor ax,ax ;restore DS,ES
mov ds,ax
mov es,ax
retf ;return to setup
;
; global descriptor table (GDT) for unreal mode
;
db (($+15) and 0fff0h)-$ dup 0ffh ;even 16
gdt: dw gdtend-gdt-1 ;GDT limit
gdtadr: dw gdt,000fh ;linear address of GDT
dw 0
dw 0ffffh,0,9300h,008fh ;4G data segment, accessed
gdtend:
;
; Enter unreal (4GB segment) mode -> change DS,ES selector
;
; based on code in DDJ 7/90
;
getunreal: cli ;disable interrupts
cs: lgdt [gdt] ;load GDT (in data module, writeable)
mov eax,cr0
or al,1 ;enable protected mode
mov cr0,eax
jmp short getunrl2 ;flush queue
getunrl2: mov bx,8 ;selector
mov ds,bx
mov es,bx
and al,0feh ;exit protected mode
mov cr0,eax
ret
;
; get back to normal segments
;
getreal: push cs
pop ds
sti
ret
;
; open flash access
;
rom_open: mov eax,80009050h ;9052 enable flash writes sc172
mov dx,0cf8
out dx,eax
xchg eax,ebx
mov dl,0fe
in al,dx
or al,2 ;enable flash write
xchg eax,ebx
mov dl,0f8
out dx,eax
mov dl,0fe
xchg eax,ebx
out dx,al
; read device ID
call getunreal ;enter unreal mode
mov ebx,rombase
mov byte [ebx+05555],0aa ;software ID
mov byte [ebx+02aaa],055
mov byte [ebx+05555],090
out iowait,al ;short delay
mov ax,[ebx] ;read the device ID
mov byte [ebx],0f0 ;exit ID mode
call getreal
mov [devid],ax
; check device ID
cmp al,0bf ;SST ?
jnz rom_open9 ;no: fail
cmp ah,0d6 ;39VF020
jz rom_open8
cmp ah,0d7 ;39VF040
jz rom_open8
cmp ah,0b5 ;39SF010
jz rom_open8
cmp ah,0d5 ;39VF010
jz rom_open8
inc byte [rom64] ;set flag for 64KB flash
cmp ah,0b4 ;39SF512
jz rom_open8
cmp ah,0d4 ;39VF512
jnz rom_open9
rom_open8:
clc
ret
rom_open9:
stc
mov si,offset msg_fail
ret
;
; close flash access
;
rom_exit: mov eax,80009050h ;9052 disable flash writes sc172
mov dx,0cf8
out dx,eax
xchg eax,ebx
mov dl,0fe
in al,dx
and al,not 2 ;enable flash write
xchg eax,ebx
mov dl,0f8
out dx,eax
mov dl,0fe
xchg eax,ebx
out dx,al
ret
;
; chip erase flash
;
rom_zap: call getunreal ;enter unreal mode
mov ebx,rombase
mov byte [ebx+05555],0aa ;erase setup
mov byte [ebx+02aaa],055
mov byte [ebx+05555],080
mov byte [ebx+05555],0aa ;erase command
mov byte [ebx+02aaa],055
mov byte [ebx+05555],010
mov bx,100 ;wait for 100 ms
call cs_waitbx
mov eax,0ffffffff ;check for erase
mov ecx,08000 ;128KB
mov edi,rombase
a4 repz scasd
jnz rom_open9 ;:failure
call getreal
clc
ret
;
; program flash [bufpt] -> [rombase]
;
rom_set: mov esi,[bufpt]
mov edi,rombase
mov ecx,020000 ;128KB
cmp byte [rom64],1 ;64KB flash ?
jnz rom_set2
shr ecx,1 ;yes
add esi,ecx
add edi,ecx
rom_set2: call getunreal
mov ebx,edi ;^base
rom_set3: mov al,[esi] ;data byte
cmp al,0ff
jz rom_set5 ;blank -> skip
mov byte [ebx+05555],0aa ;byte program command
mov byte [ebx+02aaa],055
mov byte [ebx+05555],0a0
mov [edi],al
mov dx,1000 ;time-out
rom_set4: cmp [edi],al ;correct data ?
jz rom_set5 ;:yes
dec dx
jnz rom_set4
jmp rom_open9 ;program failure, bail
rom_set5: inc esi
inc edi
dec ecx
jnz rom_set3 ;:another
call getreal
clc
ret
;
; compare flash [bufpt] -> [rombase]
;
rom_cmp: mov esi,[bufpt]
mov edi,rombase
mov ecx,020000 ;128KB
cmp byte [rom64],1 ;64KB flash ?
jnz rom_cmp2
shr ecx,1 ;yes
add esi,ecx
add edi,ecx
rom_cmp2: call getunreal
shr ecx,2
mov eax,[esi]
cmp [edi],eax
jnz rom_open9 ;:failure
lea esi,[esi+4]
lea edi,[edi+4]
dec ecx
jnz rom_cmp2
call getreal
clc
ret
;
; Wait BX milliseconds - depends on refresh rate !!!
;
cs_waitbx: inc bx
jmp short cs_wbx8
cs_wbx1: mov cx,62 ;62 refresh cycles per millisecond
cs_wbx2: in al,port61
and al,10h
mov ah,al
cs_wbx3: in al,port61 ;wait for refresh bit to change state
and al,10h
cmp al,ah
jz cs_wbx3
loop cs_wbx2 ;:another iteration
cs_wbx8: dec bx ;another millisecond ?
jnz cs_wbx1
cs_wbx9: ret
;
; flash image is appended here
;
db (($+15) and 0fff0h)-$ dup 0ffh ;even 16
buf: ;flash image follows here
+298
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@@ -0,0 +1,298 @@
;
; Xmodem protocol code, derived from Georges Menie / www.menie.org
; released under LGPL license
;
; Limitations: Only supports CRC mode. Destination offset must be
; multiple of 1K.
;
; (C)2003 Pascal Dornier / PC Engines GmbH
;
; pd 030812 initial code
; messages
xm_msgst: db "Start XMODEM transmission... ",0
xm_msgok: db 13,10,"OK",13,10,0
xm_msgsy: db 13,10,"Sync err",13,10,0
xm_msgca: db 13,10,"Cancelled",13,10,0
xm_msgre: db 13,10,"Too many retries",13,10,0
; XMODEM variables
xm_pt equ xm_base ;data destination
xm_pktsz equ xm_base+4 ;packet size (bytes)
xm_sum equ xm_base+6 ;CRC accumulator
xm_rxcrc equ xm_base+8 ;received CRC
xm_rxno equ xm_base+10 ;received packet number (norm + inv)
xm_cnt equ xm_base+12 ;byte counter
xm_pktno equ xm_base+14 ;expected packet number
xm_retran equ xm_base+15 ;retransmission counter
xm_retry equ xm_base+16 ;retry counter
xm_trych equ xm_base+17 ;trial character
;
; input AL from serial port, time-out CX (32 us each)
;
xm_in: mov cx,31000 ;about 1 second
xm_in0: mov dx,CONSOLE+5
xm_in1: in al,dx ;receive data ready ?
test al,1
jnz xm_in9 ;:yes
xm_in2: in al,port61 ;wait for refresh bit clear
test al,10h
jnz xm_in2
xm_in3: in al,port61 ;wait for refresh bit set
test al,10h
jz xm_in3
loop xm_in1
mov al,0 ;clear character
stc ;time-out
ret
xm_in9: mov dx,CONSOLE ;receive data
in al,dx
clc ;ok exit
ret
;
; output AL to serial port
;
xm_out: push dx
push ax
mov dx,CONSOLE+5
xm_out1: in al,dx ;wait for transmit ready
out iowait,ax
test al,40h
jz xm_out1
mov dl,low(CONSOLE)
pop ax
out dx,al
pop dx
ret
;
; flush input
;
xm_flush: mov cx,500 ;short time-out
call xm_in0
jnb xm_flush ;eat data
ret
;
; Copyright 2001, 2002 Georges Menie (www.menie.org)
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU Lesser General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU Lesser General Public License for more details.
;
; You should have received a copy of the GNU Lesser General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
SOH equ 001
STX equ 002
EOT equ 004
ACK equ 006
NAK equ 015
CAN equ 018
XM_MAXRETRY equ 25 ;max number retries
;
; receive file by Xmodem protocol -> [xm_pt]
;
xm_rec: mov si,offset xm_msgst ;display start message
call v_msg
mov dx,CONSOLE+1 ;disable serial interrupt
mov al,0
out dx,al
mov byte [xm_pktno],1
mov byte [xm_retran],xm_maxretry
mov byte [xm_trych],'C'
; main loop
xm_rec0: mov byte [xm_retry],16 ;for( retry = 0; retry < 16; ++retry) {
xm_rec1: dec byte [xm_retry]
jz xm_rec6 ;:end of retries
mov al,[xm_trych] ; if (trychar) _outbyte(trychar);
cmp al,0
jz xm_rec2
call xm_out
xm_rec2: mov cx,65000 ;if ((c = _inbyte((DLY_1S)<<1)) >= 0) {
call xm_in0
jb xm_rec1 ;:time-out
cmp al,SOH ;switch (c) {
jnz xm_rec3 ;case SOH:
mov word [xm_pktsz],128 ; bufsz = 128;
jmp xm_rec10 ; goto start_recv;
xm_rec3: cmp al,STX ;case STX:
jnz xm_rec4
mov word [xm_pktsz],1024 ; bufsz = 1024;
jmp xm_rec10 ; goto start_recv;
xm_rec4: cmp al,EOT ;case EOT:
jnz xm_rec5
call xm_flush; ; flushinput();
mov al,ACK ; _outbyte(ACK);
call xm_out
mov si,offset xm_msgok ;ok message
clc
xm_end: pushf
call v_msg
mov dx,CONSOLE+1 ;enable serial interrupt
mov al,1
out dx,al
popf
ret
xm_rec5: cmp al,CAN ;case CAN:
jnz xm_rec1
call xm_in ;if ((c = _inbyte(DLY_1S)) == CAN) {
cmp al,CAN
jnz xm_rec1
call xm_flush ; flushinput();
mov al,ACK ; _outbyte(ACK);
call xm_out
mov si,offset xm_msgca ; return -1; /* canceled by remote */
xm_err: stc ;error flag
jmp xm_end ;error exit
xm_rec6: ; we don't support checksum mode, too risky for firmware update !
call xm_flush ;flushinput();
mov al,CAN ;_outbyte(CAN);
call xm_out
call xm_out ;_outbyte(CAN);
call xm_out ;_outbyte(CAN);
mov si,offset xm_msgsy ;sync error
jmp xm_err
; receive a packet
xm_rec10: ;start_recv:
mov word [xm_sum],0 ;clear CRC sum
mov byte [xm_trych],0 ;trychar = 0;
les di,[xm_pt] ;p = xbuff;
call xm_in ;get packet number
jb xm_rec19 ;:reject
mov [xm_rxno],al
call xm_in ;get inverted packet number
jb xm_rec19 ;:reject
mov [xm_rxno+1],al
mov ax,[xm_pktsz] ;get packet data
mov [xm_cnt],ax
xm_rec11: call xm_in ;-> [es:di]
jb xm_rec19 ;:reject
stosb
call xm_crc ;accumulate CRC
dec word [xm_cnt]
jnz xm_rec11
call xm_in ;get CRC high
jb xm_rec19 ;:reject
mov [xm_rxcrc+1],al
call xm_in ;get CRC low
xm_rec19: jb xm_rec20 ;:reject
mov [xm_rxcrc],al
; validate packet
mov ax,[xm_rxcrc] ;compare CRC
cmp ax,[xm_sum]
jnz xm_rec20 ;:no
mov ax,[xm_rxno] ;received packet number
not ah
cmp al,ah ;match non-inverted ?
jnz xm_rec20 ;:no
cmp al,[xm_pktno] ;compare with expected packet number
jz xm_rec12 ;:ok
inc ax ;expected packet number - 1 ?
cmp al,[xm_pktno]
jnz xm_rec20 ;no: bad
jmp xm_rec14 ;send ACK, but don't update pointer
xm_rec12: mov [xm_pt],di ;good packet - update pointer
mov ax,es
cmp di,0 ;end of segment ?
jnz xm_rec13
add ax,1000h ;next segment
mov [xm_pt+2],ax ;update segment
xm_rec13: inc byte [xm_pktno] ;increment expected packet number
mov byte [xm_retran],XM_MAXRETRY
xm_rec14: dec byte [xm_retran]
jz xm_rec15 ;:too many retries
mov al,ACK
call xm_out
jmp xm_rec0 ;continue main loop, clear retry cntr
xm_rec15: call xm_flush
mov al,CAN
call xm_out
call xm_out
call xm_out
mov si,offset xm_msgre ;too many retries
jmp xm_err
xm_rec20: call xm_flush ;time-out during packet
mov al,NAK
call xm_out
jmp xm_rec1
;
; update CRC - AL = data byte, [xm_crc] = CRC accumulator
;
xm_crc: mov bx,[xm_sum]
xor al,bh
shl bx,8
mov ah,0
mov si,offset xm_crctab
add si,ax
add si,ax
xor bx,[cs:si]
mov [xm_sum],bx
ret
even
xm_crctab:
dw 00000,01021,02042,03063,04084,050a5,060c6,070e7
dw 08108,09129,0a14a,0b16b,0c18c,0d1ad,0e1ce,0f1ef
dw 01231,00210,03273,02252,052b5,04294,072f7,062d6
dw 09339,08318,0b37b,0a35a,0d3bd,0c39c,0f3ff,0e3de
dw 02462,03443,00420,01401,064e6,074c7,044a4,05485
dw 0a56a,0b54b,08528,09509,0e5ee,0f5cf,0c5ac,0d58d
dw 03653,02672,01611,00630,076d7,066f6,05695,046b4
dw 0b75b,0a77a,09719,08738,0f7df,0e7fe,0d79d,0c7bc
dw 048c4,058e5,06886,078a7,00840,01861,02802,03823
dw 0c9cc,0d9ed,0e98e,0f9af,08948,09969,0a90a,0b92b
dw 05af5,04ad4,07ab7,06a96,01a71,00a50,03a33,02a12
dw 0dbfd,0cbdc,0fbbf,0eb9e,09b79,08b58,0bb3b,0ab1a
dw 06ca6,07c87,04ce4,05cc5,02c22,03c03,00c60,01c41
dw 0edae,0fd8f,0cdec,0ddcd,0ad2a,0bd0b,08d68,09d49
dw 07e97,06eb6,05ed5,04ef4,03e13,02e32,01e51,00e70
dw 0ff9f,0efbe,0dfdd,0cffc,0bf1b,0af3a,09f59,08f78
dw 09188,081a9,0b1ca,0a1eb,0d10c,0c12d,0f14e,0e16f
dw 01080,000a1,030c2,020e3,05004,04025,07046,06067
dw 083b9,09398,0a3fb,0b3da,0c33d,0d31c,0e37f,0f35e
dw 002b1,01290,022f3,032d2,04235,05214,06277,07256
dw 0b5ea,0a5cb,095a8,08589,0f56e,0e54f,0d52c,0c50d
dw 034e2,024c3,014a0,00481,07466,06447,05424,04405
dw 0a7db,0b7fa,08799,097b8,0e75f,0f77e,0c71d,0d73c
dw 026d3,036f2,00691,016b0,06657,07676,04615,05634
dw 0d94c,0c96d,0f90e,0e92f,099c8,089e9,0b98a,0a9ab
dw 05844,04865,07806,06827,018c0,008e1,03882,028a3
dw 0cb7d,0db5c,0eb3f,0fb1e,08bf9,09bd8,0abbb,0bb9a
dw 04a75,05a54,06a37,07a16,00af1,01ad0,02ab3,03a92
dw 0fd2e,0ed0f,0dd6c,0cd4d,0bdaa,0ad8b,09de8,08dc9
dw 07c26,06c07,05c64,04c45,03ca2,02c83,01ce0,00cc1
dw 0ef1f,0ff3e,0cf5d,0df7c,0af9b,0bfba,08fd9,09ff8
dw 06e17,07e36,04e55,05e74,02e93,03eb2,00ed1,01ef0
Binary file not shown.
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{$i-,r-,s-}
{ paste user logo file into BIOS binary
Text structure:
## signature (2 bytes, at multiple of 4096)
checksum (1 byte, to avoid messing up main checksum)
text (253 bytes, terminated / padded by 0)
Compiler: Borland Pascal 7.0
History:
pd 040220 initial code
}
const
biosstart=$18000;
sig1=ord('#');
sig2=ord('#');
var
fi:file;
fn:string;
i,base:word;
newsum,oldsum:byte;
buf:array[0..32767] of byte;
newtext:array[0..252] of byte;
procedure iochk;
begin
if ioresult<>0 then begin
writeln('I/O error: ',fn);
halt(1);
end;
end;
begin
if paramcount<>2 then begin
write('Usage: <ROM file> <text file>');
halt(1);
end;
{ read new text file }
assign(fi,paramstr(2));
reset(fi,1); iochk;
fillchar(newtext,sizeof(newtext),0);
blockread(fi,newtext,sizeof(newtext),i); iochk;
close(fi); iochk;
newsum:=0;
for i:=0 to 252 do
inc(newsum,newtext[i]);
{ open ROM file }
assign(fi,paramstr(1));
reset(fi,1); iochk;
seek(fi,biosstart); iochk;
blockread(fi,buf,sizeof(buf)); iochk;
write('BIOS date: ');
for i:=$7ff5 to $7ffc do
write(char(buf[i]));
writeln;
{ find message base }
base:=0;
while (buf[base]<>sig1) or (buf[base+1]<>sig2) do begin
inc(base,$1000);
if base=sizeof(buf) then begin
write('Signature not found !');
halt(1);
end;
end;
{ calculate old checksum }
oldsum:=0;
for i:=base+3 to base+255 do
inc(oldsum,buf[i]);
{ insert new text }
move(newtext,buf[base+3],253);
inc(buf[base+2],oldsum-newsum); { update checksum }
{ write back to file }
seek(fi,biosstart+base); iochk;
blockwrite(fi,buf[base],256); iochk;
close(fi); iochk;
writeln('BIOS file updated.');
end.
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WRAP BIOS custom startup message pd 040428
To insert a custom startup message, create a text file as needed.
(e.g. TEST.MSG). Then edit the batch file P.BAT to the right file
names. Update the BIOS with SETBIOS.COM or using the serial update.
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WRAP.1C v1.01
Your message here...
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a386 wrap_cfg.8 wrap_cfg.bin
a386 wrap.8 wrap.bin
..\tool\biossum wrap.bin wrap.abs
..\tool\cat pxe.bin ..\fill32.bin ..\fill32.bin wrap_cfg.bin wrap.abs >wrap1.rom