mirror of
https://github.com/stevenhowes/wbios.git
synced 2026-05-26 15:53:34 +01:00
Initial commit of 1.11 source as released by PC Engines
Original source https://www.pcengines.ch/file/wbios111s.zip
This commit is contained in:
Steve Howes
@@ -0,0 +1,655 @@
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;
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; POST (power on self test) routines
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;
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; (C)1997-2001 Pascal Dornier / PC Engines; All rights reserved.
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; This file is licensed pursuant to the COMMON PUBLIC LICENSE 0.5.
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;
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; Limitations:
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;
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; - Ctrl-Alt-Del does not get any special treatment by POST, goes
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; through full memory test etc.
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;
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; pd050206 change from d_extop to d_exmem
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; pd030516 changed memory test display increment to 16MB
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; (faster when using serial console !)
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; pd011107 add MTEST_1PASS option
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; pd000424 add QUICKMEM option
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; pd991127 add PS/2 mouse vector
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;
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; handle error: hang if C=1, return otherwise
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;
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post_err: jb post_err1 ;:error
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ret
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post_err1: cli
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hlt ;hang
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;
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; verify BIOS checksum, return C=1 if error
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;
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post_sum: mov si,offset startofs ;start offset, must be multiple of 256
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xor bx,bx ;clear sum
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post_sum1: cs: lodsw
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add bl,al
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add bl,ah
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cs: lodsw
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add bl,al
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add bl,ah
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and si,si
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jnz post_sum1 ;:more to test
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and bl,bl ;sum = 0 ?
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jnz post_stc1 ;no: error
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post_clc1: clc
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ret
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;
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; Test memory refresh (and indirectly, 8254 timer)
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;
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#if def NO_ISAREF
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post_ref: clc ;skip test
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ret
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post_stc1: stc
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ret
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#else
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post_ref: mov cx,256
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post_ref1: in al,port61 ;wait for refresh bit = 0
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and al,10h
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jz post_ref2
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loop post_ref1
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post_stc1: stc ;timeout
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ret
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post_ref2: in al,port61 ;wait for refresh bit = 1
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and al,10h
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jnz post_clc1 ;yes: return clc
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loop post_ref2
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stc ;timeout
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ret
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#endif
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;
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; Test DMA registers
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;
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post_dma: mov dx,dma1 ;I/O port
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mov si,2 ;port increment
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post_dma1: mov di,dx ;save I/O port
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mov bx,8000h ;starting pattern
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post_dma2: call post_dma3 ;test
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jb post_stc1 ;:error
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mov dx,di ;restore I/O port
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ror bx,1 ;next pattern
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jnb post_dma2 ;:another bit
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mov dl,dma0
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shr si,1 ;do dma0 ?
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jnb post_dma1 ;:yes
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clc ;passed test
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ret
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post_dma3: mov cx,8 ;8 address and count registers
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post_dma4: mov al,bl ;write test pattern (16 bit = 2 writes)
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out dx,al
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out iowait,al
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mov al,bh
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out dx,al
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out iowait,al
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in al,dx ;read back and compare
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cmp al,bl
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jnz post_stc1
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out iowait,al
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in al,dx
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cmp al,bh
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jnz post_stc1
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out iowait,al
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add dx,si ;next port
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loop post_dma4
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clc ;ok return
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ret
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;
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; Test IRQ mask registers
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;
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post_irq: mov dx,pic0+1
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call post_reg
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jb post_irq2
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mov dl,pic1+1
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call post_reg
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post_irq2: mov al,0ffh ;mask off all interrupts
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out pic0+1,al
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out pic1+1,al
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ret
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;
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; test register [DX]
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;
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post_reg: mov bl,80h ;starting pattern
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post_reg2: mov al,bl ;write pattern
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out dx,al
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not al ;write inverted pattern to prevent
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out iowait,al ;capacitive hold
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in al,dx ;read back
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cmp al,bl
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jnz post_stc1 ;:error
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out iowait,al
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ror bl,1 ;try next bit
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jnb post_reg2
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clc ;return ok status
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post_reg9: ret
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;
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; Test DMA page registers
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;
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post_page: mov dx,fd_page
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mov cx,15 ;81..8F
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post_pag2: call post_reg
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jb post_reg9 ;:error
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inc dx
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loop post_pag2
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ret
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;
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; Test timer 2 registers
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;
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post_tim: mov al,0b0h ;timer 2
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out timer+3,al
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out iowait,ax ;this is needed, at least on M6117 !
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out iowait,ax
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#if def MEDIAGX
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out timer+2,al ;dummy write, read
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out timer+2,al
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in al,timer+2
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in al,timer+2
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#endif
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mov bx,1
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post_tim1: mov al,bl ;LSB
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out timer+2,al
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out iowait,ax
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mov al,bh ;MSB
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out timer+2,al
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out iowait,ax
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in al,timer+2 ;check LSB
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cmp al,bl
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jnz post_stc2
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out iowait,ax
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in al,timer+2 ;check MSB
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out iowait,ax
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cmp al,bh
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jnz post_stc2
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shl bx,1
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jnb post_tim1
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clc
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ret
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post_stc2: stc
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ret
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;
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; Clear registers, disable DMA, interrupts
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;
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post_clr: mov si,offset clrtab
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jmp short post_tdm0
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;
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; Initialize timers, DMA
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;
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post_tdma: mov si,tdmatab
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post_tdm0: mov dh,0
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post_tdm1: cs: lodsw
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cmp ah,0ffh ;end of table ?
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jz post_tdm9
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mov dl,ah ;port address
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out dx,al ;write data
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out iowait,al ;I/O wait
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jmp post_tdm1
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post_tdm9: ret
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;
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; global descriptor table (GDT) for unreal mode
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;
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db (($+15) and 0fff0h)-$ dup 0ffh ;even 16
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gdt: dw gdtend-gdt-1 ;GDT limit
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gdtadr: dw gdt,000fh ;linear address of GDT
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dw 0
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dw 0ffffh,0,9300h,008fh ;4G data segment, accessed
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#if def GX_GDT
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dw 0ffffh,0,9300h,408fh ;GX_BASE segment -> GS:
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#endif
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gdtend:
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;
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; Enter unreal (4GB segment) mode -> change DS,ES selector
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;
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; based on code in DDJ 7/90
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;
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getunreal: cli ;disable interrupts
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cs: lgdt [gdt] ;load GDT (in data module, writeable)
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mov eax,cr0
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or al,1 ;enable protected mode
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mov cr0,eax
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jmp short getunrl2 ;flush queue
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getunrl2: mov bx,8 ;selector
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mov ds,bx
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mov es,bx
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and al,0feh ;exit protected mode
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mov cr0,eax
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ret
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;
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; display high memory size EBP (destroyed)
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;
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post_dsph: push ebp ;save EBP
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#if def GX_VID
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mov ax,0e0bh ;display clear to beginning of line
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#else
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mov ax,0e0dh ;display CR
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#endif
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mov bl,0
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int 10h
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pop eax ;EBP -> EAX
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shr eax,10 ;display high memory size
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;div 1024 -> KB
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sub eax,1024 ;sub eax,#1024
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;fall through
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;
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; display number EAX
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;
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; divide / stack based algorithm
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;
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post_itoa: xor dx,dx ;mark first digit on stack
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push dx
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mov ecx,10
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post_ito2: xor edx,edx
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div ecx
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or dl,"0" ;remainder -> ASCII digit
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push dx ;push digit
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and eax,eax ;done ?
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jnz post_ito2
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post_ito3: pop ax ;get digit
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and al,al
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jz post_ito9
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mov ah,0eh ;TTY output
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mov bh,0 ;page 0
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int 10h
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jmp post_ito3
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post_ito9: ret
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;
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; size low memory -> EBX = top address; 64KB granularity
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; (run in unreal mode)
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;
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post_szlo: mov ebx,0a0000h ;top limit
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xor ecx,ecx ;bottom limit
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post_szl0: mov edx,ebx ;save top
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mov edi,10000h ;64KB increment
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; first, write address to memory, counting down
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post_szl1: sub ebx,edi
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mov [ebx],ebx
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cmp ebx,ecx
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jnz post_szl1
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; now, verify going up
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post_szl2: add ebx,edi
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cmp [ebx],ebx
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jnz post_szl3 ;error: done
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cmp ebx,edx
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jnz post_szl2
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post_szl3: ret ;ebx = top address
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;
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; size high memory
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; (run in unreal mode)
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;
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; first, we do binary rough size
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post_szhi: xor esi,esi ;start seed
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mov [esi],esi
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mov ebx,00100000h ;1MB start
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mov ecx,ebx ;start for szlo
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post_szh1: mov [ebx],ebx
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cmp [esi],esi ;wrote over previous ?
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jnz post_szh2 ;:yes - reached top
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cmp [ebx],ebx ;this location ok ?
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jnz post_szh2 ;:no - reached top
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mov esi,ebx ;new seed location
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shl ebx,1
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test ebx,TOP_MEM shl 16 ;reached top ?
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jz post_szh1 ;:not yet
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post_szh2: jmp post_szl0 ;ebx is top limit - use low size
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;algorithm now for 64KB resolution
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;
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; Test 64 KB memory block [EBP]
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; (run in unreal mode)
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;
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; preserve EDX !
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;
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post_t64k: mov edi,ebp ;starting address (must be at 64K
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;multiple)
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; first, do a 64 bit sliding bit test over first 64 x 64 bits
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mov eax,1 ;test pattern
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xor ebx,ebx
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post_tk1: mov [edi],eax
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mov [edi+4],ebx
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add di,8
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shl eax,1
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rcl ebx,1
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jnb post_tk1 ;:another bit
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xor di,di ;return to start
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mov eax,1 ;test pattern
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xor ebx,ebx
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post_tk2: cmp [edi],eax
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jnz post_tk9 ;:error
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cmp [edi+4],ebx
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jnz post_tk9 ;:error
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add di,8
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shl eax,1
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rcl ebx,1
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jnb post_tk2
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; now, write initial test pattern seed
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; 72 bytes long -> always get distance between
|
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; current cache line and destination
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mov eax,00100100100100100100100100100100xb ;test pattern
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post_tk3: mov edi,ebp ;start location
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mov di,16 ;skip first 16 bytes
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mov esi,edi
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mov cx,18
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post_tk4: a4 stosd
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test al,4 ;"round" rotate
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jz post_tk41 ;implicit CLC
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stc
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post_tk41: rcr eax,1
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dec cx
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jnz post_tk4 ;:another
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; do block move -> copies pattern all over memory
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mov ecx,16362 ;word count
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a4 rep movsd
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; now verify final pattern
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post_tk5: cmp eax,[esi]
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jnz post_tk9 ;:error
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test al,4 ;"round" rotate
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jz post_tk51 ;implicit CLC
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stc
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post_tk51: rcr eax,1
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add si,4
|
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jnz post_tk5
|
||||
|
||||
test al,4 ;"round" rotate
|
||||
jz post_tk52 ;implicit CLC
|
||||
stc
|
||||
post_tk52:
|
||||
|
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#if !def MTEST_1PASS
|
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rcr eax,1 ;try next pattern
|
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jnb post_tk3 ;:again, total of three passes
|
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#endif
|
||||
|
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mov edi,ebp
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xor eax,eax
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mov cx,16384
|
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a4 rep stosd ;clear memory
|
||||
|
||||
mov ebp,edi ;new top
|
||||
clc
|
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ret
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||||
|
||||
post_tk9: stc ;error return
|
||||
ret
|
||||
|
||||
#IF DEF QUICKMEM
|
||||
;
|
||||
; Clear 64 KB memory block [EBP]
|
||||
; (run in unreal mode)
|
||||
;
|
||||
; preserve EDX !
|
||||
;
|
||||
post_c64k: mov edi,ebp ;starting address (must be at 64K
|
||||
;multiple)
|
||||
xor eax,eax ;zero fill
|
||||
mov ecx,4000h
|
||||
a4 rep stosd ;fill
|
||||
mov ebp,edi ;mov ebp,edi - new top
|
||||
clc
|
||||
ret
|
||||
#ENDIF
|
||||
;
|
||||
; base memory test
|
||||
;
|
||||
post_base: call getunreal ;enter unreal mode
|
||||
call post_szlo ;size low memory
|
||||
mov [tmp_losz],ebx
|
||||
|
||||
mov word [m_lomem],64 ;we have at least 64KB DRAM
|
||||
mov ebp,10000h ;start address
|
||||
|
||||
post_bas0:
|
||||
#IF DEF QUICKMEM
|
||||
call post_c64k ;clear 64K of DRAM
|
||||
#ELSE
|
||||
call post_t64k ;test 64K of DRAM
|
||||
#ENDIF
|
||||
jb post_bas1 ;:error
|
||||
add word [m_lomem],64 ;we got another 64KB
|
||||
cmp ebp,[tmp_losz]
|
||||
jnz post_bas0 ;:another block
|
||||
|
||||
post_bas1: xor ax,ax ;access BIOS segment
|
||||
mov ds,ax
|
||||
mov es,ax
|
||||
|
||||
#if def CM_LEGACY
|
||||
mov ah,cm_meml ;write base memory size to CMOS
|
||||
mov al,[m_lomem]
|
||||
call rtc_write
|
||||
mov al,[m_lomem+1]
|
||||
mov ah,cm_memh ;write low memory size
|
||||
call rtc_write
|
||||
#endif
|
||||
ret
|
||||
;
|
||||
; init interrupt vectors
|
||||
;
|
||||
post_vec: mov si,offset inttab ;init interrupt vectors
|
||||
xor di,di ;vec00
|
||||
mov ax,cs ;BIOS segment -> eax bit 31..16
|
||||
shl eax,16
|
||||
mov cx,1fh
|
||||
post_vec1: cs: lodsw ;copy vectors 00.1e
|
||||
stosd ;vector + segment
|
||||
loop post_vec1
|
||||
add di,4 ;skip vector 1F
|
||||
|
||||
mov cl,60h-20h
|
||||
mov ax,offset intdummy ;dummy vectors 20..5F
|
||||
rep stosd
|
||||
add di,8*4 ;skip 60..67
|
||||
mov cl,8
|
||||
rep stosd ;fill 68..6F
|
||||
|
||||
mov cl,8 ;copy 8 more vectors
|
||||
post_vec2: cs: lodsw ;copy vectors 70..77
|
||||
stosd
|
||||
loop post_vec2
|
||||
ret
|
||||
;
|
||||
; Extended memory test
|
||||
;
|
||||
post_ext: call getunreal ;enter unreal mode again (& cli)
|
||||
|
||||
push dword [0] ;save lowest memory - zapped by
|
||||
;post_szhi
|
||||
call post_szhi ;size high memory
|
||||
pop dword [0]
|
||||
|
||||
mov [tmp_hisz],ebx
|
||||
|
||||
mov ebp,100000h ;start address
|
||||
|
||||
post_ext0:
|
||||
#IF ! DEF QUICKMEM
|
||||
test ebp,0ffffffh ;reached 16MB boundary ?
|
||||
jnz post_ext1
|
||||
pushad ;save all registers
|
||||
call post_dsph ;display current count
|
||||
call getunreal ;get back to unreal mode
|
||||
popad ;restore all registers
|
||||
#ENDIF
|
||||
post_ext1:
|
||||
#IF DEF QUICKMEM
|
||||
call post_c64k ;clear 64K of DRAM
|
||||
#ELSE
|
||||
call post_t64k ;test 64K of DRAM
|
||||
#ENDIF
|
||||
jb post_ext2 ;:error
|
||||
cmp ebp,[tmp_hisz]
|
||||
jnz post_ext0 ;:another block
|
||||
|
||||
post_ext2: push ebp ;save actual top of memory
|
||||
call post_dsph ;display current count
|
||||
mov si,msg_ext ;display " KB Extended Memory"
|
||||
call v_msg
|
||||
|
||||
xor ax,ax ;access BIOS segment
|
||||
mov ds,ax
|
||||
mov es,ax
|
||||
|
||||
call cs_shadrw ;shadow read/write
|
||||
pop eax
|
||||
push eax
|
||||
sub eax,0100000 ;subtract base memory
|
||||
mov dword [cs:d_exmem],eax ;store top address in data area
|
||||
movzx eax,word [m_lomem]
|
||||
shl eax,10 ;convert KB into actual size
|
||||
mov dword [cs:d_basmem],eax
|
||||
|
||||
call cs_shadro
|
||||
|
||||
pop ebx ;store extended memory size in CMOS
|
||||
shr ebx,10 ;convert to KB
|
||||
cmp ebx,10000h ;limit to 64MB
|
||||
jb >l1
|
||||
xor bx,bx
|
||||
l1: sub bx,1024 ;minus base memory
|
||||
|
||||
mov ah,cm_exh ;write high memory size
|
||||
mov al,bh
|
||||
call rtc_write
|
||||
mov al,bl
|
||||
mov ah,cm_exl ;write low memory size
|
||||
#if def CM_LEGACY
|
||||
call rtc_write
|
||||
mov ah,cm_exh2 ;write high memory size
|
||||
mov al,bh
|
||||
call rtc_write
|
||||
mov al,bl
|
||||
mov ah,cm_exl2 ;write low memory size
|
||||
#endif
|
||||
jmp rtc_write
|
||||
;
|
||||
; scan for option ROMs
|
||||
;
|
||||
post_scan: mov ds,bx
|
||||
cmp word [0],0aa55h ;start signature
|
||||
jnz post_scn8 ;:no
|
||||
mov cl,[2] ;get length
|
||||
shl cx,9 ;* 512
|
||||
xor si,si ;start offset
|
||||
xor al,al ;clear sum
|
||||
post_scn1: add al,[si] ;calculate checksum
|
||||
inc si
|
||||
loop post_scn1
|
||||
mov word [es:m_ioofs],3 ;offset - call vector
|
||||
mov [es:m_ioseg],ds ;segment
|
||||
shr si,4
|
||||
add bx,si ;update segment
|
||||
cmp al,0
|
||||
jnz post_scn9 ;:bad checksum
|
||||
|
||||
push bx ;save segment
|
||||
push dx ;save limit
|
||||
call far [es:m_ioofs] ;call ROM
|
||||
cld ;just in case they set it...
|
||||
pop dx ;restore limit
|
||||
pop bx ;restore segment
|
||||
jmp short post_scn9
|
||||
|
||||
post_scn8: add bx,0080h
|
||||
post_scn9: cmp bx,dx ;top limit ?
|
||||
jb post_scan ;:no
|
||||
xor ax,ax ;restore segments
|
||||
mov ds,ax
|
||||
mov es,ax
|
||||
ret
|
||||
;
|
||||
; Interrupt vector table
|
||||
;
|
||||
inttab: dw int00 ;divide by zero
|
||||
dw int01 ;single step
|
||||
dw nmi ;NMI
|
||||
dw int03 ;breakpoint
|
||||
dw int04 ;overflow
|
||||
dw int05 ;print screen
|
||||
dw int06 ;invalid opcode
|
||||
dw int07 ;coprocessor not available
|
||||
dw irq0 ;IRQ0 system timer
|
||||
dw irq1 ;IRQ1 keyboard
|
||||
dw inteoi ;reserved - cascade
|
||||
dw inteoi ;IRQ3 reserved
|
||||
dw inteoi ;IRQ4 reserved
|
||||
dw inteoi ;IRQ5 reserved
|
||||
dw irq6 ;IRQ6 floppy
|
||||
dw inteoi ;IRQ7 reserved
|
||||
dw int10 ;video
|
||||
dw int11 ;equipment determination
|
||||
dw int12 ;memory size
|
||||
dw int13 ;disk
|
||||
dw int14 ;serial
|
||||
dw int15 ;system services
|
||||
dw int16 ;keyboard
|
||||
dw int17 ;printer
|
||||
dw int18 ;expansion ROM
|
||||
dw int19 ;bootstrap
|
||||
dw int1a ;timer / RTC
|
||||
dw int1b ;keyboard break
|
||||
dw int1c ;user timer tick
|
||||
dw v_parm ;video parameters
|
||||
dw fd_ptab ;diskette parameters
|
||||
|
||||
dw irq8 ;IRQ8: RTC
|
||||
dw inteoi2 ;IRQ9: cascade
|
||||
dw inteoi2 ;IRQ10: spare
|
||||
dw inteoi2 ;IRQ11: spare
|
||||
#if def PS2MOUSE
|
||||
dw irq12
|
||||
#else
|
||||
dw inteoi2 ;IRQ12: spare
|
||||
#endif
|
||||
dw irq13 ;IRQ13: spare
|
||||
dw irq14 ;IRQ14: hard disk
|
||||
#if def HD_4DRV
|
||||
dw irq15 ;IRQ15: hard disk
|
||||
#else
|
||||
dw inteoi2 ;IRQ15: spare
|
||||
#endif
|
||||
;
|
||||
; Display POST code AL
|
||||
;
|
||||
; This routine is called very early, without a stack.
|
||||
; If you decide to display POST codes to a serial or parallel
|
||||
; port, you will have to initialize the super I/O first.
|
||||
;
|
||||
#if ! def postcode ;can be overridden by user routine
|
||||
postcode: out post,al
|
||||
ret
|
||||
#endif
|
||||
;
|
||||
; Display fatal error code AL
|
||||
;
|
||||
; This routine is called on fatal errors, e.g. bad memory.
|
||||
; We just write the POST code, then hang.
|
||||
;
|
||||
#if ! def fatal ;can be overridden by user routine
|
||||
fatal: out post,al
|
||||
fatal1: hlt
|
||||
jmp fatal1
|
||||
#endif
|
||||
Reference in New Issue
Block a user